Patents by Inventor Yi-Ming Huang

Yi-Ming Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972957
    Abstract: A gas flow accelerator may include a body portion, and a tapered body portion including a first end integrally formed with the body portion. The gas flow accelerator may include an inlet port connected to the body portion and to receive a process gas to be removed from a semiconductor processing tool by a main pumping line. The semiconductor processing tool may include a chuck and a chuck vacuum line to apply a vacuum to the chuck to retain a semiconductor device. The tapered body portion may be configured to generate a rotational flow of the process gas to prevent buildup of processing byproduct on interior walls of the main pumping line. The gas flow accelerator may include an outlet port integrally formed with a second end of the tapered body portion. An end portion of the chuck vacuum line may be provided through the outlet port.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-chun Yang, Chih-Lung Cheng, Yi-Ming Lin, Po-Chih Huang, Yu-Hsiang Juan, Xuan-Yang Zheng
  • Publication number: 20240134261
    Abstract: A projection device, including a light source module and a color wheel, is provided. The light source module includes a plurality of solid-state lighting sources driven by a DC drive power to sequentially provide a first light generated by a first number of light sources, a second light generated by a second number of light sources and a third light generated by a third number of light sources within a response cycle, wherein the number of light sources to be turn on is less than or equivalent to a total number of solid-state lighting sources. The color wheel has a first block, a second block and a third block, respectively corresponding to the first to third lights, so that the projection device sequentially outputs a first color light with a first brightness, a second color light with a second brightness and a third color light with a third brightness.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 25, 2024
    Applicant: Qisda Corporation
    Inventors: Jia-Ming ZHANG, Yi-Ling LO, Ching-Tze HUANG
  • Patent number: 11968556
    Abstract: A network quality measurement method and system are provided. In the method, a movement path and a movement speed of a vehicle device are determined according to a size of a space and an endurance time of the vehicle device, and the vehicle device is controlled to move on the movement path at the movement speed. During a movement of the vehicle device, a network quality in the space is measured according to a measurement frequency to generate network quality data. Whether the network quality in the space is changed is determined according to the network quality data. Whether there is an obstacle around the vehicle device is detected. When it is determined that the network quality in the space is changed or the obstacle is detected around the vehicle device, at least one of the movement path, the movement speed, and the measurement frequency is adjusted.
    Type: Grant
    Filed: December 26, 2021
    Date of Patent: April 23, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hui-Ping Kuo, Sheng-Chieh Huang, Hsin-Hui Hwang, Yi-Ming Wu, Man Ju Chien
  • Publication number: 20240126354
    Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed for power budgeting for computer peripherals with electronic devices. An example apparatus to budget power in an electronic device includes interface circuitry; machine readable instructions; and programmable circuitry to at least one of instantiate or execute the machine readable instructions to: detect a Type-C event associated with a computer peripheral; write a power level offset based on an assumed power contract for the computer peripheral during debounce time; obtain an actual power contract for the computer peripheral; and adjust the power level offset based on the actual power contract.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Inventors: Kunal Shah, Prabhakar Subrahmanyam, Venkataramani Gopalakrishnan, Chuen Ming Tan, Venkataramana Kotakonda, Mitsu Shah, Kannappan Rajaraman, Yi Jen Huang, Dmitriy Berchanskiy, Swathi Nukala
  • Publication number: 20240128378
    Abstract: A semiconductor device includes a first transistor and a protection structure. The first transistor includes a gate electrode, a gate dielectric disposed on the gate electrode, and a channel layer disposed on the gate dielectric. The protection structure is laterally surrounding the gate electrode, the gate dielectric and the channel layer of the first transistor. The protection structure includes a first capping layer and a dielectric portion. The first capping layer is laterally surrounding and contacting the gate electrode, the gate dielectric and the channel layer of the first transistor. The dielectric portion is disposed on the first capping layer and laterally surrounding the first transistor.
    Type: Application
    Filed: January 30, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Cheng Chu, Chien-Hua Huang, Yu-Ming Lin, Chung-Te Lin
  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Publication number: 20240104043
    Abstract: Embodiments herein relate to a module which can be inserted into or removed from a computing device by a user. The module includes an input-output port which is configured for a desired specification, such as USB-A, USB-C, Thunderbolt, DisplayPort or HDMI. The port can be provided on an expansion card such as an M.2 card for communicating with a host platform. The host platform can communicate with different types of modules in a standardized way so that complexity and costs are reduced. In another aspect, with a dual port module, the host platform can concurrently send/receive power through one port and send/receive data from the other port.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Shailendra Singh Chauhan, Nirmala Bailur, Reza M. Zamani, Jackson Chung Peng Kong, Charuhasini Sunder Raman, Venkataramani Gopalakrishnan, Chuen Ming Tan, Sreejith Satheesakurup, Karthi Kaliswamy, Venkata Mahesh Gunnam, Yi Jen Huang, Kie Woon Lim, Dhinesh Sasidaran, Pik Shen Chee, Venkataramana Kotakonda, Kunal A. Shah, Ramesh Vankunavath, Siva Prasad Jangili Ganga, Ravali Pampala, Uma Medepalli, Tomer Savariego, Naznin Banu Wahab, Sindhusha Kodali, Manjunatha Venkatarauyappa, Surendar Jeevarathinam, Madhura Shetty, Deepak Sharma, Rohit Sharad Mahajan
  • Publication number: 20240105879
    Abstract: A light-emitting diode and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, an LED wafer is provided. The LED wafer includes a substrate and a light-emitting semiconductor stacking structure positioned on the surface of the substrate. The light-emitting semiconductor stacking structure includes a first type semiconductor layer, an active layer, and a second type semiconductor layer from a side of the substrate. Second, dicing lanes are defined on the upper surface of the LED wafer. Third, dicing is performed along the dicing lanes of the substrate using a laser. The laser is focused on the lower surface of the substrate to form a surface hole and focused inside the substrate to form an internal hole. The diameter of the surface hole is greater than the diameter of the internal hole. Fourth, the LED wafer is separated into LED chips along the dicing lanes.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 28, 2024
    Applicant: Quanzhou sanan semiconductor technology Co., Ltd.
    Inventors: TSUNG-MING LIN, CHUNG-YING CHANG, YI-JUI HUANG, YU-TSAI TENG
  • Publication number: 20240092662
    Abstract: A method for removing a heavy metal from water includes subjecting a microbial solution containing a liquid culture of a urease-producing bacterial strain and a reaction solution containing a manganese compound and urea to a microbial-induced precipitation reaction, so as to obtain biomineralized manganese carbonate (MnCO3) particles, admixing the biomineralized MnCO3 particles with water containing a heavy metal, so that the biomineralized MnCO3 particles adsorb the heavy metal in the water to form a precipitate, and removing the precipitate from the water.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 21, 2024
    Inventors: Chien-Yen CHEN, Yi-Hsun HUANG, Pin-Yun LIN, Anggraeni Kumala DEWI, Koyeli DAS, Uttara SUKUL, Tsung-Hsien CHEN, Raju Kumar SHARMA, Cheng-Kang LU, Chung-Ming LU
  • Patent number: 11917230
    Abstract: A system and method for maximizing bandwidth in an uplink for a 5G communication system is disclosed. Multiple end devices generate image streams. A gateway is coupled to the end devices. The gateway includes a gateway monitor agent collecting utilization rate data of the gateway and an image inspector collecting inspection data from the received image streams. An edge server is coupled to the gateway. The edge server includes an edge server monitor agent collecting utilization rate data of the edge server. An analytics manager is coupled to the gateway and the edge server. The analytics manager is configured to determine an allocation strategy based on the collected utilization rate data from the gateway and the edge server.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Quanta Cloud Technology Inc.
    Inventors: Yi-Neng Zeng, Keng-Cheng Liu, Wei-Ming Huang, Shih-Hsun Lai, Ji-Jeng Lin, Chia-Jui Lee, Liao Jin Xiang
  • Patent number: 11663993
    Abstract: A display system includes a host and a display. The host executes a first application and a program. The program sets a first display parameter corresponding to the first application. The display receives a signal provided by the host. The signal includes a desktop image. The first application is operated at a first window on the desktop image. The program outputs the first display parameter to the display. The display sets the first window with the first display parameter and displays, and displays the non-first window area of the desktop image with a preset display parameter.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: May 30, 2023
    Assignee: Qisda Corporation
    Inventors: Yu-Fu Fan, Yi-Ming Huang, Yu-Chun Lin
  • Patent number: 11641124
    Abstract: Provided is an electronic device configured to be charged with an adapter. The electronic device includes an energy storage unit, a charging unit and a switch unit. The charging unit is configured to receive a bus voltage and output a charging voltage to charge the energy storage unit. The switch unit is electrically coupled in parallel to the charging unit. When the electronic device is coupled to the adapter through a bus interface, the electronic device receives the bus voltage from the adapter, receives a communication signal from the adapter, and selectively turns on or off the switch unit according to the communication signal, and when the electronic device operates in a direct charging mode, the switch unit is turned on to form a direct charging path, to charge the energy storage unit by using the bus voltage.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: May 2, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Tsung-Han Wu, Wei-Gen Chung, Yi-Ming Huang, Chien-Chung Lo
  • Publication number: 20220238656
    Abstract: A semiconductor device includes an epitaxial straining region formed within a semiconductor substrate, the straining region being positioned adjacent to a gate stack, the gate stack being positioned above a channel. The straining region comprises a defect comprising two crossing dislocations such that a cross-point of the dislocations is closer to a bottom of the straining region than to a top of the straining region. The straining region comprises an element with a smaller lattice constant than a material forming the substrate.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Inventors: Hsiu-Ting Chen, Yi-Ming Huang, Shih-Chieh Chang, Hsing-Chi Chen, Pei-Ren Jeng
  • Patent number: 11302782
    Abstract: A semiconductor device includes an epitaxial straining region formed within a semiconductor substrate, the straining region being positioned adjacent to a gate stack, the gate stack being positioned above a channel. The straining region comprises a defect comprising two crossing dislocations such that a cross-point of the dislocations is closer to a bottom of the straining region than to a top of the straining region. The straining region comprises an element with a smaller lattice constant than a material forming the substrate.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: April 12, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiu-Ting Chen, Yi-Ming Huang, Shih-Chieh Chang, Hsing-Chi Chen, Pei-Ren Jeng
  • Publication number: 20220108668
    Abstract: A display system includes a host and a display. The host executes a first application and a program. The program sets a first display parameter corresponding to the first application. The display receives a signal provided by the host. The signal includes a desktop. The first application is operated at a first window on the desktop. The program outputs the first display parameter to the display. The display sets the first window with the first display parameter and displays, and displays the non-first window area of the desktop with a preset display parameter.
    Type: Application
    Filed: July 7, 2021
    Publication date: April 7, 2022
    Applicant: Qisda Corporation
    Inventors: Yu-Fu FAN, Yi-Ming HUANG, Yu-Chun LIN
  • Publication number: 20200266274
    Abstract: A semiconductor device includes an epitaxial straining region formed within a semiconductor substrate, the straining region being positioned adjacent to a gate stack, the gate stack being positioned above a channel. The straining region comprises a defect comprising two crossing dislocations such that a cross-point of the dislocations is closer to a bottom of the straining region than to a top of the straining region. The straining region comprises an element with a smaller lattice constant than a material forming the substrate.
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Inventors: Hsiu-Ting Chen, Yi-Ming Huang, Shih-Chieh Chang, Hsing-Chi Chen, Pei-Ren Jeng
  • Patent number: 10707691
    Abstract: An electronic device includes an energy storage unit, a charge pump circuit, a charging circuit, and a controller. The charge pump circuit is electrically connected to the power supply, and the power supply is configured to receive the input electrical energy. The charging circuit is electrically connected between the charge pump circuit and the energy storage unit. The controller is electrically connected with the power supply, the charge pump circuit, and the charging circuit respectively, and the controller controls the charge pump circuit and the charging circuit to switch among a plurality of charging modes according to compatibility information of the power supply.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: July 7, 2020
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yi-Ming Huang, Feng-Chi Shen, Chien-Chung Lo, Shin-Hong Wu
  • Patent number: 10644116
    Abstract: A method includes forming a recess in a semiconductor substrate, the recess being adjacent to a gate stack, performing an epitaxial growth process within the recess to form a straining region, and forming a defect within the straining region in-situ with the epitaxial growth process.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: May 5, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiu-Ting Chen, Yi-Ming Huang, Shih-Chieh Chang, Hsing-Chi Chen, Pei-Ren Jeng
  • Patent number: 10630101
    Abstract: A charging-discharging module of the energy storage unit is provided. The charging-discharging module of the energy storage unit includes a first energy storage unit; a second energy storage unit; a first switching unit electrically connected to a first terminal of the second energy storage unit; a selecting circuit electrically connected to a first terminal of the first energy storage unit and the first switching unit to selectively conduct the first energy storage unit or the second energy storage unit to a system circuit; and a processing unit electrically connected to the first switching unit. A charging and discharging method is also provided.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: April 21, 2020
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chang-Lin Hsieh, Yi-Ming Huang, Chien-Chung Lo, Wei-Chen Tu
  • Publication number: 20180278082
    Abstract: Provided is an electronic device configured to be charged with an adapter. The electronic device includes an energy storage unit, a charging unit and a switch unit. The charging unit is configured to receive a bus voltage and output a charging voltage to charge the energy storage unit. The switch unit is electrically coupled in parallel to the charging unit. When the electronic device is coupled to the adapter through a bus interface, the electronic device receives the bus voltage from the adapter, receives a communication signal from the adapter, and selectively turns on or off the switch unit according to the communication signal, and when the electronic device operates in a direct charging mode, the switch unit is turned on to form a direct charging path, to charge the energy storage unit by using the bus voltage.
    Type: Application
    Filed: March 16, 2018
    Publication date: September 27, 2018
    Inventors: Tsung-Han WU, Wei-Gen CHUNG, Yi-Ming HUANG, Chien-Chung LO