Patents by Inventor Yiming Miao

Yiming Miao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device layout structure manufacturing method
    Patent number: 11658228
    Abstract: A method for manufacturing semiconductor devices is provided. The method includes: providing a substrate structure comprising a semiconductor substrate and a trench insulator portion in the semiconductor substrate; forming a dummy gate on the semiconductor substrate; performing a first ion implantation into the semiconductor substrate to form a first doped region between the trench insulator portion and the dummy gate; and forming a first connecting member connecting the dummy gate with the first doped region.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: May 23, 2023
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Gang Qian, Yiming Miao, Yanlin Sun, Xubo Chen
  • SEMICONDUCTOR DEVICE LAYOUT STRUCTURE MANUFACTURING METHOD
    Publication number: 20210296470
    Abstract: A method for manufacturing semiconductor devices is provided. The method includes: providing a substrate structure comprising a semiconductor substrate and a trench insulator portion in the semiconductor substrate; forming a dummy gate on the semiconductor substrate; performing a first ion implantation into the semiconductor substrate to form a first doped region between the trench insulator portion and the dummy gate; and forming a first connecting member connecting the dummy gate with the first doped region.
    Type: Application
    Filed: June 9, 2021
    Publication date: September 23, 2021
    Inventors: Gang QIAN, Yiming MIAO, Yanlin SUN, Xubo CHEN
  • Semiconductor device layout structure and manufacturing method thereof
    Patent number: 11063132
    Abstract: A semiconductor device includes a semiconductor substrate, a trench isolator portion in the semiconductor substrate, a dummy gate on the semiconductor substrate, a first doped region between the trench isolator portion and the dummy gate in the semiconductor substrate, and a first connecting member electrically connected the dummy gate with the first doped region. With the dummy gate electrically connected to the first doped region, a transistor including the dummy gate is turned off, thereby preventing the occurrence of current leakage and improving the reliability of a memory device having the semiconductor device.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: July 13, 2021
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Gang Qian, Yiming Miao, Yanlin Sun, Xubo Chen
  • SEMICONDUCTOR DEVICE LAYOUT STRUCTURE AND MANUFACTURING METHOD THEREOF
    Publication number: 20180069093
    Abstract: A semiconductor device includes a semiconductor substrate, a trench isolator portion in the semiconductor substrate, a dummy gate on the semiconductor substrate, a first doped region between the trench isolator portion and the dummy gate in the semiconductor substrate, and a first connecting member electrically connected the dummy gate with the first doped region. With the dummy gate electrically connected to the first doped region, a transistor including the dummy gate is turned off, thereby preventing the occurrence of current leakage and improving the reliability of a memory device having the semiconductor device.
    Type: Application
    Filed: July 13, 2017
    Publication date: March 8, 2018
    Inventors: GANG QIAN, Yiming Miao, Yanlin Sun, Xubo Chen