Abstract: A fitness posture guidance method and a fitness posture guidance system are provided. A setting of a plurality of target fitness postures and one attention part of a target fitness action is received. A plurality of target frames respectively corresponding to the target fitness postures are obtained from an expert video according to a plurality of marked times. A professional angle range of the attention part of each of the target fitness postures is obtained based on a plurality of body feature points of each of the target frames to generate an expert motion model. The expert motion model is integrated with an application motion model to generate a final motion model including a final angle range of the attention part of each of the target fitness postures. A prompt function is executed according to the final motion model and multiple body postures in a real-time video stream.

Abstract: A coil-type fluid-impervious zipper including: a left chain connected with a left supporting fabric tape, and a right chain connected with a right supporting fabric tape; where a left filler structure made of a first thermoplastic elastomer is formed within the left chain, a right filler structure made of the first thermoplastic elastomer is formed within the right chain, a left attachment strip made of a second thermoplastic elastomer is connected to a right side of the left filler structure, a right attachment strip made of the second thermoplastic elastomer is connected to a left side of the right filler structure, and when the coil-type fluid-impervious zipper is zipped up, the left attachment strip and the right attachment strip are compressed to engage with each other within a first gap formed between the left filler structure and the right filler structure.

Abstract: The present invention provides a PTX3 monoclonal antibody or antibody Fab fragment thereof and use thereof. The aforementioned monoclonal antibody or antibody Fab fragment thereof specifically inhibit or slow down the binding of PTX3 to the PTX3 receptor, and may be used for a kit and method for detecting PTX3, and a pharmaceutical composition which inhibits or slows down diseases or symptoms associated with PTX3 and PTX3 receptor binding, and a use thereof.

Abstract: A slider capable of minimizing scratching on zipper, which includes a top side plate, a bottom side plate opposing the top side plate, and a link part connecting the top side plate and the bottom side plate, the bottom side plate having two side walls extending from two side edges thereof, the top side plate having a top inner surface and a top outer surface, the bottom side plate having a bottom inner surface and a bottom outer surface, and an internal passage being formed by the top inner surface, the bottom inner surface, the side walls and the link part; and the slider being characterized in that a pair of parallel longitudinal grooves are formed in the top inner surface and/or the bottom inner surface during a molding process to accommodate at least a part of a set of border lines of a combination mold.

Abstract: Methods and systems described herein involve using long cell-free DNA fragments to analyze a biological sample from a pregnant subject. The status of methylated CpG sites and single nucleotide polymorphisms (SNPs) is often used to analyze DNA fragments of a biological sample. A CpG site and a SNP are typically separated from the nearest CpG site or SNP by hundreds or thousands of base pairs. Finding two or more consecutive CpG sites or SNPs on most cell-free DNA fragments is improbable or impossible. Cell-free DNA fragments longer than 600 bp may include multiple CpG sites and/or SNPs. The presence of multiple CpG sites and/or SNPs on long cell-free DNA fragments may allow for analysis than with short cell-free DNA fragments alone. The long cell-free DNA fragments can be used to identify a tissue of origin and/or to provide information on a fetus in a pregnant female.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.

Abstract: A heterogeneous integration capacitor and a metal-oxide-metal (MoM) capacitor are provided. The heterogeneous integration capacitor has a first electrode and a second electrode, and includes a substrate, a semiconductor capacitor, the MoM capacitor, and a metal-insulator-metal (MiM) capacitor. These capacitors are sequentially formed on the substrate, and are formed as connected in parallel.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a dielectric layer formed over the substrate. The semiconductor device structure further includes a movable membrane formed over the dielectric layer. In addition, the movable membrane includes first recessed portions arranged in a ring shape in a top view and second recessed portions surrounded by the first recessed portions.

Abstract: Systems and methods are provided for performing photothermal dynamic imaging. An exemplary method includes: scanning a sample to produce a plurality of raw photothermal dynamic signals; receiving the raw photothermal dynamic signals of the sample; generating a plurality of second signals by matched filtering the raw photothermal dynamic signals to reject non-modulated noise; and performing an inverse operation on the second signals to retrieve at least one thermodynamic signal in a temporal domain.

Abstract: A method and structure providing an optical sensor having an optimized Ge—Si interface includes providing a substrate having a pixel region and a logic region. In some embodiments, the method further includes forming a trench within the pixel region. In various examples, and after forming the trench, the method further includes forming a doped semiconductor layer along sidewalls and along a bottom surface of the trench. In some embodiments, the method further includes forming a germanium layer within the trench and over the doped semiconductor layer. In some examples, and after forming the germanium layer, the method further includes forming an optical sensor within the germanium layer.

Abstract: An integrated circuit (IC) device includes a substrate, such as a printed circuit board (PCB) substrate. A chip assembly is disposed over the substrate. The chip assembly includes an IC, a plurality of electronic memory devices coupled to the IC, and a molding compound material that circumferentially surrounds the IC and the electronic memory devices collectively in a top view. A thermal interface material (TIM) is disposed over the chip assembly. The TIM includes an indium alloy, a gallium alloy, or an alloy that contains bismuth, indium, and tin. An adhesive dam is disposed over the substrate. The adhesive dam surrounds the chip assembly and the TIM laterally. A lid structure is disposed over the substrate and encapsulates the chip assembly therein. The lid structure includes one or more openings that expose portions of the TIM. The one or more openings accommodate an expansion of the TIM.

Abstract: A manufacturing method of a package structure includes: coupling a device package to a package substrate, where the device package includes semiconductor dies encapsulated by an insulating encapsulation and electrically coupled to the package substrate; forming a first dielectric pattern on the device package opposite to the package substrate, where the first dielectric pattern includes openings corresponding to the semiconductor dies of the device package; forming a thermal conductive material on the semiconductor dies of the device package and in the openings of the first dielectric pattern; placing a heat dissipating component over the device package and the package substrate, the heat dissipating component being in contact with the first dielectric pattern and the thermal conductive material; and performing a thermal treatment process on the first dielectric pattern and the thermal conductive material to form a thermal interface material structure coupling the heat dissipating component to the device pack

Abstract: One embodiment of the present invention sets forth a technique for sampling from a dataset. The technique includes determining a plurality of embeddings for a plurality of data points included in the dataset. The technique also includes populating a tree structure with the plurality of embeddings by generating a first node that stores a first set of embeddings included in the plurality of embeddings and generating a first plurality of nodes as children of the first node, where each node in the first plurality of nodes stores a different subset of embeddings in the first set of embeddings. The technique further includes sampling a subset of embeddings from the plurality of embeddings via a traversal of the tree structure, and generating a sampled dataset that includes a subset of data points corresponding to the subset of embeddings.

Abstract: One embodiment of the present invention sets forth a technique for sampling from a dataset comprises. The technique includes determining a plurality of embeddings for a plurality of objects depicted in a plurality of images in the dataset. The technique also includes populating a tree structure with the plurality of embeddings by generating a first node that stores a first set of embeddings and generating a first plurality of nodes as children of the first node, where each node included in the first plurality of nodes stores a different subset of embeddings included in the first set of embeddings. The technique further includes sampling a subset of embeddings from the plurality of embeddings via a traversal of the tree structure and generating a sampled dataset that includes a subset of images based on the subset of embeddings and a number of images to be included in the sampled dataset.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.

Abstract: Various embodiments of the present disclosure are directed towards an electronic device that comprises a semiconductor substrate having a first surface opposite a second surface. The semiconductor substrate at least partially defines a cavity. A first microelectromechanical systems (MEMS) device is disposed along the first surface of the semiconductor substrate. The first MEMS device comprises a first backplate and a diaphragm vertically separated from the first backplate. A second MEMS device is disposed along the first surface of the semiconductor substrate. The second MEMS device comprises spring structures and a moveable element. The spring structures are configured to suspend the moveable element in the cavity. A segment of the semiconductor substrate continuously laterally extends from under a sidewall of the first MEMS device to under a sidewall of the second MEMS device.

Abstract: A vacuum hole for suction holding a processing target object through vacuum is formed on a stage surface of a vacuum suction holding stage, and a hole corresponding to the vacuum hole is formed on an elastic pad. A jig includes a first projecting portion configured to be insertable into the vacuum hole on the vacuum suction holding stage, a support portion configured to come into contact with the stage surface with the first projecting portion inserted in the vacuum hole, and a second projecting portion projecting toward an opposite side to the first projecting portion with respect to the support portion and configured to be insertable into the hole on the elastic pad.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a first dielectric layer formed over the substrate. The semiconductor device structure also includes a first movable membrane formed over the first dielectric layer. In addition, the first movable membrane has a first corrugated portion and a first edge portion connecting to the first corrugated portion. The semiconductor device structure further includes a second dielectric layer formed over the first movable membrane. In addition, the first edge portion is sandwiched between the first dielectric layer and the second dielectric layer, the first corrugated portion is partially sandwiched between the first dielectric layer and the second dielectric layer and is partially exposed by a cavity, and a bottom surface of the first corrugated portion is lower than a bottom surface of the first edge portion.

Abstract: A vapor chamber heatsink assembly, under vacuum, having a working fluid therein, comprising a plurality of heatsink fins and a vapor chamber is provided. The vapor chamber and the plurality of heatsink fins each comprise a plurality of obstructers defining a plurality of braided channels therein. Thus, the condenser regions of the vapor chamber are expanded to the plurality of heatsink fins. When heat from a greater temperature heat source and a lower temperature heat source is applied to the vapor chamber, via the plurality of obstructers and braided channels, the working fluid and liquid vapor travel therethrough, providing an effective phase change mechanism to the greater temperature heat source, while concurrently, hindering agglomeration of working fluid thereto. An effective phase change mechanism is also concurrently provided to the lower temperature heat source due to the non-agglomeration of working fluid to the greater temperature heat source.

Abstract: A vapor chamber heatsink assembly, under vacuum, having a working fluid therein, comprising a plurality of heatsink fins and a vapor chamber is provided. The vapor chamber and the plurality of heatsink fins each comprise a plurality of obstructers defining a plurality of braided channels therein. Thus, the condenser regions of the vapor chamber are expanded to the plurality of heatsink fins. When heat from a greater temperature heat source and a lower temperature heat source is applied to the vapor chamber, via the plurality of obstructers and braided channels, the working fluid and liquid vapor travel therethrough, providing an effective phase change mechanism to the greater temperature heat source, while concurrently, hindering agglomeration of working fluid thereto. An effective phase change mechanism is also concurrently provided to the lower temperature heat source due to the non-agglomeration of working fluid to the greater temperature heat source.