Patents by Inventor Yin-Chieh Hsueh

Yin-Chieh Hsueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130114213
    Abstract: An electronic device having a base includes a circuit board, a electronic element, and a heat sink. The electronic element is mounted on the circuit board. The heat sink attaches to the electronic element. The heat sink includes an attaching wall and at least one side wall. The attaching wall attaches to the electronic element and having two opposite ends. At least one side wall connects to the ends of the attaching wall. The side wall and the attaching wall form a tube with an intake opening and an outtake opening. The intake opening faces the base and the outtake opening is opposite to the intake opening.
    Type: Application
    Filed: November 9, 2011
    Publication date: May 9, 2013
    Applicant: SILICON INTERGRATED SYSTEMS CORP.
    Inventors: Tsai-Chih Tsai, Yin-Chieh Hsueh, Shih-Ya Lin
  • Publication number: 20110279980
    Abstract: A heat dissipation structure for a liquid crystal television is disclosed. The liquid crystal television includes a front plate and a rear plate. The front plate has a screen and a metal backboard. The heat dissipation structure includes a printed circuit board (PCB) mounted to the metal backboard; a television integrated circuit (IC) chip for controlling operations of the liquid crystal television being attached on the PCB; and one or more heat dissipating posts provided between the PCB and the metal backboard. The heat generated by the television IC chip is dispersed to the metal backboard via the heat dissipating post or posts.
    Type: Application
    Filed: May 11, 2010
    Publication date: November 17, 2011
    Applicant: Silicon Integrated Systems Corp.
    Inventors: Tsai-Chih Tsai, Jhih-Jhong Jian, Yin-Chieh Hsueh
  • Publication number: 20070277997
    Abstract: Layout methods for a substrate are disclosed. In one embodiment, the method includes: defining a first plating line on a non-conducting layer coupled to a first pad; and defining a second plating line on the first conducting layer coupled to a second pad. Along a direction away from the first pad and the second pad, a distance between the first plating line and the second plating line becomes longer. In another embodiment, the method includes: defining a plating line on a non-conducting layer, the plating line being coupled to a pad; and replacing a portion of at least a conducting layer with a non-conducting material, wherein the portion is directly under the plating line.
    Type: Application
    Filed: June 1, 2006
    Publication date: December 6, 2007
    Inventors: Wei-An Liang, Chung-Ju Wu, Yin-Chieh Hsueh
  • Patent number: 6747350
    Abstract: A flip chip package structure. The structure includes a substrate, an IC chip electrically connected to the substrate through a plurality of conductive bumps, encapsulant between the substrate and IC chip, and an electrically protective device. The substrate has interior wiring, a plurality of first contacts arranged at a predetermined pitch among each other on a surface, and a trace line area beyond the first contacts on the surface. The electrically protective device has a protruding part covering the IC chip, and an extending part extending over the surface of the substrate with a gap as large as 40 mil. The extending part further covers the trace line area, and connects to the surface of the substrate using a fixing material.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: June 8, 2004
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Wei-Feng Lin, Yin-Chieh Hsueh, Chung-Ju Wu