Patents by Inventor Yin-Chuan Chen

Yin-Chuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230267266
    Abstract: A method for forming a photomask includes following operations. A first photomask is received. The first photomask includes a first pattern and a first scattering bar. The first photomask is used to remove a first portion of a target layer to form a first opening and a second opening. The first opening corresponds to the first pattern, and the second opening corresponds to the first scattering bar. A second photomask is received. The second photomask includes a second pattern. The second photomask is used to remove a second portion of the target layer to form a third opening. The third opening corresponds to the second pattern. The second opening is widened to form the third opening using the second photomask.
    Type: Application
    Filed: April 25, 2023
    Publication date: August 24, 2023
    Inventors: CHIN-MIN HUANG, CHING-HUNG LAI, JIA-GUEI JOU, YIN-CHUAN CHEN, CHI-MING TSAI
  • Patent number: 11669670
    Abstract: A method for forming a photomask is provided. The method includes: receiving an initial layout, the initial layout comprising a first pattern and a second pattern; decomposing the initial layout into a first layout including the first pattern and a second layout including the second pattern; inserting a third pattern into the first layout; overlapping the first layout including the first pattern and the third pattern to the second layout including the second pattern; increasing a width of the third pattern in the first layout overlapping the second pattern in the second layout to form a fourth pattern in the first layout; and outputting the first layout comprising the first pattern, the third pattern and the fourth pattern into a first photomask.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin-Min Huang, Ching-Hung Lai, Jia-Guei Jou, Yin-Chuan Chen, Chi-Ming Tsai
  • Publication number: 20210089701
    Abstract: A method for forming a photomask is provided. The method includes: receiving an initial layout, the initial layout comprising a first pattern and a second pattern; decomposing the initial layout into a first layout including the first pattern and a second layout including the second pattern; inserting a third pattern into the first layout; overlapping the first layout including the first pattern and the third pattern to the second layout including the second pattern; increasing a width of the third pattern in the first layout overlapping the second pattern in the second layout to form a fourth pattern in the first layout; and outputting the first layout comprising the first pattern, the third pattern and the fourth pattern into a first photomask.
    Type: Application
    Filed: December 8, 2020
    Publication date: March 25, 2021
    Inventors: CHIN-MIN HUANG, CHING-HUNG LAI, JIA-GUEI JOU, YIN-CHUAN CHEN, CHI-MING TSAI
  • Patent number: 10867107
    Abstract: A method for forming a photomask is provided. The method includes: receiving an initial layout including a plurality of first patterns and a plurality of second patterns; decomposing the initial layout into a first layout including the plurality of first patterns and a second layout including the plurality of second patterns; inserting a plurality of third patterns into the first layout, wherein each of the plurality of third patterns is adjacent to at least one of the plurality of first patterns; comparing the first layout and the second layout; identifying a fourth pattern as an overlapping portion of the plurality of third patterns overlapping one of the plurality of second patterns; increasing a width of the fourth pattern; and outputting the first layout including the first patterns, the third patterns and the fourth patterns into a first photomask.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin-Min Huang, Ching-Hung Lai, Jia-Guei Jou, Yin-Chuan Chen, Chi-Ming Tsai
  • Publication number: 20200097631
    Abstract: A method for forming a photomask is provided. The method includes: receiving an initial layout including a plurality of first patterns and a plurality of second patterns; decomposing the initial layout into a first layout including the plurality of first patterns and a second layout including the plurality of second patterns; inserting a plurality of third patterns into the first layout, wherein each of the plurality of third patterns is adjacent to at least one of the plurality of first patterns; comparing the first layout and the second layout; identifying a fourth pattern as an overlapping portion of the plurality of third patterns overlapping one of the plurality of second patterns; increasing a width of the fourth pattern; and outputting the first layout including the first patterns, the third patterns and the fourth patterns into a first photomask.
    Type: Application
    Filed: September 25, 2018
    Publication date: March 26, 2020
    Inventors: CHIN-MIN HUANG, CHING-HUNG LAI, JIA-GUEI JOU, YIN-CHUAN CHEN, CHI-MING TSAI
  • Patent number: 10151971
    Abstract: A method, of seeding an optical proximity correction (OPC) process, includes: receiving, at an input device of a computer, a subject pre-OPC design-signature for a subject pre-OPC design package; selecting, by the processor and via interaction with an OPC database operatively connected to the computer, one amongst archived post-OPC design packages based on relatedness between the subject pre-OPC design-signature and archived post-OPC design-signatures corresponding to the archived post-OPC design packages, and thereby retrieving the selected archived post-OPC design packages; and generating one or more seeds for the OPC process based on the selected archived post-OPC design package.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: December 11, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yin-Chuan Chen, Chi-Ming Tsai, Shin-Huang Chen
  • Publication number: 20180004079
    Abstract: A method, of seeding an optical proximity correction (OPC) process, includes: receiving, at an input device of a computer, a subject pre-OPC design-signature for a subject pre-OPC design package; selecting, by the processor and via interaction with an OPC database operatively connected to the computer, one amongst archived post-OPC design packages based on relatedness between the subject pre-OPC design-signature and archived post-OPC design-signatures corresponding to the archived post-OPC design packages, and thereby retrieving the selected archived post-OPC design packages; and generating one or more seeds for the OPC process based on the selected archived post-OPC design package.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 4, 2018
    Inventors: Yin-Chuan CHEN, Chi-Ming TSAI, Shin-Huang CHEN
  • Patent number: 8984459
    Abstract: Methods and apparatus of performing layout-versus-layout (LVL) comparison are disclosed. A layout may be in various formats such as GDSII or OASIS, for different circuits, and represented by a basic layout element, a hierarchical cell or a plurality of independent cells in various layers. A basic layout element, a hierarchical cell, and a layout with a plurality of independent cells may have a signature generated according to the embodiment methods. The signature of a basic layout element may be generated based on values of a center and a circumference, and a hashed trace value generated by a hash function of a trace of the basic layout element. The signature of a hierarchical cell can be generated recursively. A signature of a first layout may be compared to a signature of a second layout to determine whether the first layout matches the second layout.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: March 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shin-Huang Chen, Yin-Chuan Chen
  • Publication number: 20130298094
    Abstract: Methods and apparatus of performing layout-versus-layout (LVL) comparison are disclosed. A layout may be in various formats such as GDSII or OASIS, for different circuits, and represented by a basic layout element, a hierarchical cell or a plurality of independent cells in various layers. A basic layout element, a hierarchical cell, and a layout with a plurality of independent cells may have a signature generated according to the embodiment methods. The signature of a basic layout element may be generated based on values of a center and a circumference, and a hashed trace value generated by a hash function of a trace of the basic layout element. The signature of a hierarchical cell can be generated recursively. A signature of a first layout may be compared to a signature of a second layout to determine whether the first layout matches the second layout.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 7, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shin-Huang Chen, Yin-Chuan Chen