Abstract: Various embodiments of the present disclosure are directed towards an image sensor with a passivation layer for dark current reduction. A device layer overlies a substrate. Further, a cap layer overlies the device layer. The cap and device layers and the substrate are semiconductor materials, and the device layer has a smaller bandgap than the cap layer and the substrate. For example, the cap layer and the substrate may be silicon, whereas the device layer may be or comprise germanium. A photodetector is in the device and cap layers, and the passivation layer overlies the cap layer. The passivation layer comprises a high k dielectric material and induces formation of a dipole moment along a top surface of the cap layer.

Abstract: Image sensors and methods of forming the same are provided. An image sensor according to the present disclosure includes a silicon substrate, a germanium region disposed in the silicon substrate, a doped semiconductor isolation layer disposed between the silicon substrate and the germanium region, a heavily p-doped region disposed on the germanium region, a heavily n-doped region disposed on the silicon substrate, a first n-type well disposed immediately below the germanium region, a second n-type well disposed immediately below the heavily n-doped region, and a deep n-type well disposed below and in contact with the first n-type well and the second n-type well.

Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed in a silicon substrate, in some embodiments, or on a silicon substrate, in some embodiments. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer is on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair of doped regions in the germanium layer is configured as an e-lens of the germanium-based sensor.

Abstract: A semiconductor image sensor includes a first substrate including a first front side and a first back side, a second substrate including a second front side and a second back side, a third substrate including a third front side and a third back side, a first interconnect structure, and a second interconnect structure. The first substrate includes a layer and a first light-sensing element in the layer. The layer includes a first semiconductor material, and the first light-sensing element includes a second semiconductor material. The second substrate is bonded to the first substrate with the second front side facing the first back side. The third substrate is bonded to the first substrate with the third front side facing the first front side. The first interconnect structure and the second interconnect structure are disposed between the first front side and the third front side.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.

Abstract: A method of manufacturing a semiconductor structure includes: forming a light-absorption layer in a substrate; forming a first doped region of a first conductivity type and a second doped region of a second conductivity type in the light-absorption layer adjacent to the first doped region; depositing a first patterned mask layer over the light-absorption layer, wherein the first patterned mask layer includes an opening exposing the second doped region and covers the first doped region; forming a first silicide layer in the opening on the second doped region; depositing a barrier layer over the first doped region; and annealing the barrier layer to form a second silicide layer on the first doped region.

Abstract: Germanium-based sensors are disclosed herein. An exemplary germanium-based sensor includes a germanium photodiode and a junction field effect transistor (JFET) formed from a germanium layer disposed in a silicon substrate, in some embodiments, or on a silicon substrate, in some embodiments. A doped silicon layer, which can be formed by in-situ doping epitaxially grown silicon, is disposed between the germanium layer and the silicon substrate. In embodiments where the germanium layer on the silicon substrate, the doped silicon layer is disposed between the germanium layer and an oxide layer. The JFET has a doped polysilicon gate, and in some embodiments, a gate diffusion region is disposed in the germanium layer under the doped polysilicon gate. In some embodiments, a pinned photodiode passivation layer is disposed in the germanium layer. In some embodiments, a pair doped region pair in the germanium layer is configured as an e-lens of the germanium-based sensor.

Abstract: The present disclosure provides a semiconductor structure, including a substrate including a first material, wherein the first material generates electrical signals from radiation within a first range of wavelengths, an image sensor element including a second material, wherein the second material generates electrical signals from radiation within a second range of wavelengths, the second range is different from first range, a transparent layer proximal to a light receiving surface of the image sensor element, wherein the transparent layer is transparent to radiation within the second range of wavelength, and an interconnect structure connected to a signal transmitting surface of the image sensor element.

Abstract: Various embodiments of the present disclosure are directed towards an image sensor with a passivation layer for dark current reduction. A device layer overlies a substrate. Further, a cap layer overlies the device layer. The cap and device layers and the substrate are semiconductor materials, and the device layer has a smaller bandgap than the cap layer and the substrate. For example, the cap layer and the substrate may be silicon, whereas the device layer may be or comprise germanium. A photodetector is in the device and cap layers, and the passivation layer overlies the cap layer. The passivation layer comprises a high k dielectric material and induces formation of a dipole moment along a top surface of the cap layer.

Abstract: A method and structure providing an optical sensor having an optimized Ge—Si interface includes providing a substrate having a pixel region and a logic region. In some embodiments, the method further includes forming a trench within the pixel region. In various examples, and after forming the trench, the method further includes forming a doped semiconductor layer along sidewalls and along a bottom surface of the trench. In some embodiments, the method further includes forming a germanium layer within the trench and over the doped semiconductor layer. In some examples, and after forming the germanium layer, the method further includes forming an optical sensor within the germanium layer.

Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having a first semiconductor material. A second semiconductor material is disposed on the first semiconductor material. The second semiconductor material is a group IV semiconductor or a group III-V compound semiconductor. A passivation layer is disposed on the second semiconductor material. The passivation layer includes the first semiconductor material. A first doped region and a second doped region extend through the passivation layer and into the second semiconductor material.

Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.

Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.

Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.

Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.

Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.

Abstract: A method of forming an integrated circuit structure includes providing a silicon substrate, and implanting a p-type impurity into the silicon substrate to form a p-type region. After the step of implanting, performing an anneal to form a silicon oxide region, with a portion of the p-type region converted to the silicon oxide region.

Abstract: A method of forming an integrated circuit structure includes providing a silicon substrate, and implanting a p-type impurity into the silicon substrate to form a p-type region. After the step of implanting, performing an anneal to form a silicon oxide region, with a portion of the p-type region converted to the silicon oxide region.

Abstract: A system and method for image sensing is disclosed. An embodiment comprises a substrate with a pixel region and a logic region. A first resist protect oxide (RPO) is formed over the pixel region, but not over the logic region. Silicide contacts are formed on the top of active devices formed in the pixel region, but not on the surface of the substrate in the pixel region, and silicide contacts are formed both on the top of active devices and on the surface of the substrate in the logic region. A second RPO is formed over the pixel region and the logic region, and a contact etch stop layer is formed over the second RPO. These layers help to reflect light back to the image sensor when light impinges the sensor from the backside of the substrate, and also helps prevent damage that occurs from overetching.