Patents by Inventor Yin-Nien Chen

Yin-Nien Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Hybrid TFET-MOSFET circuit design
    Patent number: 9412439
    Abstract: A circuit includes a hybrid switch, which includes a Tunnel Field-Effect Transistor (TFET) having a first source, a first drain, and a first gate. The hybrid switch further includes a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) connected to the TFET in parallel, with the MOSFET including a second source connected to the first source, a second drain connected to the first drain, and a second gate connected to the first gate.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Long Fan, Pi-Ho Hu, Yin-Nien Chen, Pin Su, Ching-Te (Kent) Chuang, Samuel C. Pan
  • HYBRID TFET-MOSFET CIRCUIT DESIGN
    Publication number: 20160211838
    Abstract: A circuit includes a hybrid switch, which includes a Tunnel Field-Effect Transistor (TFET) having a first source, a first drain, and a first gate. The hybrid switch further includes a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) connected to the TFET in parallel, with the MOSFET including a second source connected to the first source, a second drain connected to the first drain, and a second gate connected to the first gate.
    Type: Application
    Filed: January 16, 2015
    Publication date: July 21, 2016
    Inventors: Ming-Long Fan, Pi-Ho Hu, Yin-Nien Chen, Pin Su, Ching-Te (Kent) Chuang, Samuel C. Pan
  • Independently-controlled-gate SRAM
    Patent number: 8717807
    Abstract: The present invention provides an IG 7T FinFET SRAM, which adopts independently-controlled-gate super-high-VT FinFETs to achieve a stacking-like property, whereby to eliminate the read disturb and half-select disturb. Further, the present invention uses keeper circuits and read control voltage to reduce leakage current of the bit lines during read. Furthermore, the present invention can effectively overcome the problem of the conventional 6T SRAM that is likely to have read errors at low operation voltage.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: May 6, 2014
    Assignee: National Chiao Tung University
    Inventors: Ching-Te Chuang, Yin-Nien Chen, Chien-Yu Hsieh, Ming-Long Fan, Pi-Ho Hu, Pin Su
  • INDEPENDENTY-CONTROLLED-GATE SRAM
    Publication number: 20130100731
    Abstract: The present invention provides an IG 7T FinFET SRAM, which adopts independently-controlled-gate super-high-VT FinFETs to achieve a stacking-like property, whereby to eliminate the read disturb and half-select disturb. Further, the present invention uses keeper circuits and read control voltage to reduce leakage current of the bit lines during read. Furthermore, the present invention can effectively overcome the problem of the conventional 6T SRAM that is likely to have read errors at low operation voltage.
    Type: Application
    Filed: March 13, 2012
    Publication date: April 25, 2013
    Inventors: Ching-Te CHUANG, Yin-Nien Chen, Chien-Yu Hsieh, Ming-Long Fan, Pi-Ho Hu, Pin Su