Patents by Inventor Ying An Liu

Ying An Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230118990
    Abstract: A method of manufacturing a semiconductor device includes alternately stacking first semiconductor layers and second semiconductor layers over a substrate, patterning the first and second semiconductor layers into a fin structure, forming a dielectric layer across the fin structure, and removing the first semiconductor layers of the fin structure thereby forming gaps between the second semiconductor layers of the fin structure. The method also includes depositing a first metal layer to wrap around the second semiconductor layers thereby forming voids between opposing sidewalls of the dielectric layer, recessing the first metal layer, forming a blocking layer over the recessed first metal layer thereby covering the voids, and depositing a second metal layer over the blocking layer.
    Type: Application
    Filed: April 15, 2022
    Publication date: April 20, 2023
    Inventors: Cheng-Wei Chang, Shahaji B. More, Yi-Ying Liu
  • Publication number: 20230124549
    Abstract: An exemplary method includes forming a semiconductor fin having a semiconductor layer stack over a semiconductor mesa. The semiconductor layer stack includes a first semiconductor layer, a second semiconductor layer, and the first semiconductor layer is between the semiconductor mesa and the second semiconductor layer. The method further includes forming an isolation feature adjacent the semiconductor mesa and forming a semiconductor cladding layer along a sidewall of the semiconductor layer stack. The semiconductor cladding layer extends below a top surface of the semiconductor mesa and a portion of the isolation feature is between the semiconductor cladding layer and a sidewall of the semiconductor mesa. The method further includes, in a channel region, replacing the first semiconductor layer of the semiconductor fin and the semiconductor cladding layer with a gate stack. The portion of the isolation feature is between the gate stack and the sidewall of the semiconductor mesa.
    Type: Application
    Filed: March 11, 2022
    Publication date: April 20, 2023
    Inventors: Cheng-Wei Chang, Shahaji B. More, Yi-Ying Liu, Shuen-Shin Liang, Sung-Li Wang
  • Publication number: 20230110659
    Abstract: Systems, methods, and non-transitory computer-readable media can access a plurality of schema-based encodings providing a structured representation of an environment captured by one or more sensors associated with a plurality of vehicles traveling through the environment. The plurality of schema-based encodings can be clustered into one or more clusters of schema-based encodings. At least one scenario associated with the environment can be determined based at least in part on the one or more clusters of schema-based encodings.
    Type: Application
    Filed: September 2, 2022
    Publication date: April 13, 2023
    Applicant: Lyft, Inc.
    Inventors: Lina Dong, Weiyi Hou, Somesh Khandelwal, Ivan Kirigin, Shaojing Li, Ying Liu, David Tse-Zhou Lu, Robert Charles Kyle Pinkerton, Vinay Shet, Shaohui Sun
  • Publication number: 20230113720
    Abstract: Provided are an electrolyte functional additive for a lithium ion battery, a lithium ion battery electrolyte and the lithium ion battery. Calculated in parts by weight, the functional additive includes 0.1-0.5 parts of lithium tetrafluoroborate, 0.3-1.5 parts of lithium bisoxalate borate, and 0.2-2 parts of vinylene carbonate. The functional additive guarantees that a dense and stable SEI film is formed on the surface of a negative electrode, and high-temperature storage performance and high-temperature cycle performance of the battery are improved.
    Type: Application
    Filed: November 6, 2020
    Publication date: April 13, 2023
    Inventors: Yanhui ZHI, Ying LIU
  • Patent number: 11623926
    Abstract: The present disclosure describes an electroluminescent material which is formed of a compound having a structure of Formula (I), an OLED display panel utilizing the compound and an electronic device having the OLED display panel. The OLED display panel includes a first electrode, a second electrode, and an organic thin film layer disposed between the first electrode and the second electrode. The organic thin film layer comprises an electron transport layer which comprises any one or a combination of at least two of the compounds. The electroluminescent material has a triplet energy level ET of ?2.7 eV, a HOMO energy level of ??5.85 eV, and a glass transition temperature of >120° C. This compound improves luminous efficiency in the OLED display panel and the electronic device.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: April 11, 2023
    Assignee: WUHAN TIANMA MICROELECTRONICS CO., LTD. SHANGHAI BRANCH
    Inventors: Lei Zhang, Wei Gao, Jinghua Niu, Wenpeng Dai, Yan Lu, Yang Li, Ying Liu
  • Patent number: 11626595
    Abstract: A cathode in a solid oxide fuel cell containing AgPrCoO3. The operating temperature range of the cathode is from about 400° C. to about 850° C.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: April 11, 2023
    Assignee: Phillips 66 Company
    Inventors: Ye Lin, Ying Liu
  • Publication number: 20230106133
    Abstract: A SerDes module clock network architecture comprises, a reference clock input port, a plurality of data transmission channels, several user logic interfaces, several frequency division branches and a phase locked loop. The reference lock input port receives an input clock and conveys the input clock to the phase locked loop, the phase locked loop receives the input lock and outputs a PLL output clock signal, the PLL output clock signal is conveyed to the plurality of data transmission channels, and the PLL output clock signal is conveyed to the frequency division branches, and after frequency division, user interface clocks are output and conveyed to the user logic interfaces. When the PLL output clock signal in a SerDes is provided to an internal dedicated channel, several frequency division branches are also divided, and after frequency division, the signal is output to the user logic interfaces for use by an FPGA.
    Type: Application
    Filed: March 24, 2021
    Publication date: April 6, 2023
    Applicant: SHENZHEN PANGO MICROSYSTEMS CO.,LTD.
    Inventors: Shengwen XIANG, Ying LIU
  • Publication number: 20230108095
    Abstract: Example methods relate to avoiding beacon collisions between a repeater and a root AP, optimizing traffic flows based on buffers queued within hardware, and/or optimizing transmissions through a trigger-based mechanism. An example method includes determining loads on buffers within a repeater configured to communicate according to a DBVC protocol. The loads on the buffers correspond to data to be transmitted within upstream and downstream networks. The method includes determining whether to adjust a DBVC duty cycle of the repeater based on the loads. The DBVC duty cycle includes: an on channel duty cycle comprising a ratio of time on an on channel to total time on both the on and off channels; or an off channel duty cycle comprising a ratio of time on the off channel to total time on both the on and off channels. The method includes adjusting the DBVC duty cycle of the repeater.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 6, 2023
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Ying LIU, Richard KINDER
  • Publication number: 20230105436
    Abstract: A method and an apparatus for video processing are provided. The method includes that a decoding terminal receives a plurality of coded video frames coded using one or more generative adversarial networks (GANs), receives network parameters related to the one or more GANs, and decodes the plurality of coded video frames using GANs based on the network parameters. Further, the one or more GANs respectively implement one or more video coding functions including reference-frame coding, motion-compensated frame prediction, and residue-frame coding.
    Type: Application
    Filed: October 6, 2021
    Publication date: April 6, 2023
    Applicants: KWAI INC., SANTA CLARA UNIVERSITY
    Inventors: Pengli DU, Ying LIU, Nam LING, Lingzhi LIU, Yongxiong REN, Ming Kai HSU
  • Patent number: 11621427
    Abstract: A solid oxide fuel cell comprising an anode layer, an electrolyte layer, and a two phased cathode layer. The two phased cathode layer comprises praseodymium and gadolinium-doped ceria. Additionally, the solid oxide fuel cell does not contain a barrier layer.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: April 4, 2023
    Assignee: Phillips 66 Company
    Inventors: Ye Lin, Ying Liu, Matthew Lundwall, James A. Enterkin
  • Publication number: 20230097292
    Abstract: The present application relates to the field of underwater propeller, and more particular, to a multifunctional underwater propeller, which includes a propeller body. The propeller body is detachably connected with a handle, and a surface of the propeller body is connected with an adapter structure for detachably connecting external equipment. The adapter structure includes a connecting piece and a slide rail, and the connecting piece is in plug-in connection with the slide rail, and configured for detachably connecting the external equipment.
    Type: Application
    Filed: September 16, 2022
    Publication date: March 30, 2023
    Inventor: Ying'an LIU
  • Patent number: 11610825
    Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A first depth parameter (t) of the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on the first depth parameter (t).
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: March 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fen Chen, Tsung-Ying Liu, Yeh-Hsun Fang, Bang-Yu Huang, Chui-Ya Peng
  • Publication number: 20230083836
    Abstract: A magnetic recording writer is disclosed. In some embodiments, the writer includes a main pole having a front portion and a back portion, a gap layer surround the main pole at the ABS, and a shield structure. The front portion includes a pole tip at an ABS plane, a pole tip thickness in a down-track direction, and curved sidewalls on each side of a center plane that is orthogonal to the ABS and bisects the main pole. The back portion includes first flared sidewalls extending from the curved sidewalls at an angle between 0 and 25 degrees relative to planes parallel to the center plane. The shield structure includes sidewalls having a sidewall portion facing the main pole and formed substantially conformal to the curved sidewalls up to a height of about 30-200 nm where the sidewall portions no longer follow the shape of the main pole.
    Type: Application
    Filed: September 10, 2021
    Publication date: March 16, 2023
    Inventors: Ying Liu, Yuhui Tang, Jiun-Ting Lee, Yue Liu
  • Patent number: 11600808
    Abstract: Various methods and techniques for enhancing a silicon-containing anode for a battery cell are presented. The methods may include providing a silicon-containing anode having reversible electrochemical capabilities including a silicon-containing material and an anode material compatible with a lithium-ion battery chemistry having porous and conductive mechanical properties. The methods may also include enriching a surface layer of the silicon-containing anode with sodium ions to intersperse the sodium ions between silicon atoms of the silicon-containing material. The methods may also include displacing the sodium ions with potassium ions to form a compression layer in the silicon-containing anode. The potassium ions may place the silicon atoms of the silicon-containing material in a pre-compressive state to counteract internal stress exerted on the silicon-containing material.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 7, 2023
    Assignee: CHONGQING JINKANG POWERTRAIN NEW ENERGY CO., LTD.
    Inventors: Scott Monismith, Brennan Campbell, Ying Liu, Yifan Tang
  • Patent number: 11585859
    Abstract: Embodiments described herein generally relate to the modification of State of Charge (SoC) calculations within electric vehicles (EVs). A database of data points may be generated based on characteristics of a battery cell at various measured SoCs within a controlled environment. Subsequently, during the operation of an EV, a battery management system (BMS) within the EV may collect various operating data points. The collected operating data points may be utilized to reference similar data points stored in the database in order to determine an SoC value. The SoC value may be utilized to modify or alter the SoC calculations by the BMS for an EV in operation.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: February 21, 2023
    Assignee: CHONGQING JINKANG POWERTRAIN NEW ENERGY CO., LTD.
    Inventors: Wenke Zhang, Saeed Khaleghi Rahimian, Jun Hou, Brennan Campbell, Ying Liu
  • Patent number: 11581259
    Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: February 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Wei Chang, Chien-Shun Liao, Sung-Li Wang, Shuen-Shin Liang, Shu-Lan Chang, Yi-Ying Liu, Chia-Hung Chu, Hsu-Kai Chang
  • Publication number: 20230040992
    Abstract: A bidirectional power converter includes a first switch circuit coupled to a second switch circuit via a transformer, wherein the first switch circuit is configured to transfer power to the second switch circuit during a charging mode, the second switch circuit is configured to transfer power to the first switch circuit during a discharging mode, and the first switch circuit is configured to operate in a half bridge configuration during a first portion of the charging mode.
    Type: Application
    Filed: December 24, 2019
    Publication date: February 9, 2023
    Inventors: Chen WEI, Dongfeng ZHU, Haitao XIE, Ying LIU, Jianwen SHAO
  • Patent number: D978126
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: February 14, 2023
    Inventor: Ying Liu
  • Patent number: D980871
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: March 14, 2023
    Assignee: JIANGSU YOUMAY ELECTRIC APPLIANCE CO., LTD.
    Inventor: Ying'an Liu
  • Patent number: D981897
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 28, 2023
    Inventor: Ying Liu