Patents by Inventor Ying-Cheng Huang

Ying-Cheng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11977250
    Abstract: A lighting keyboard includes a backlight module and at least one keyswitch. The backlight module includes a lighting substrate and a protruding structure. The lighting substrate includes two non-intersecting traces and a light emitting unit. The light emitting unit is connected between the two non-intersecting traces. A position of the protruding structure corresponds to a position of the light emitting unit and the protruding structure is located between the two non-intersecting traces. The at least one keyswitch is disposed on the backlight module.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: May 7, 2024
    Assignee: DARFON ELECTRONICS CORP.
    Inventors: Ying-Lan Liu, Hsin-Cheng Ho, Heng-Yi Huang
  • Publication number: 20240116148
    Abstract: A tool set includes a tool holder, a tool and a tool rack. The tool has a groove unit. The tool holder has a latch unit that engages the groove unit. The tool rack includes a rack body and a blocking member. When the tool holder is moved away from the rack body after the tool is moved into the rack body by the tool holder and after the blocking member moves to a blocking position, the tool is blocked by the blocking member so that the latch unit is separated from the groove unit and that the tool holder is separated from the tool.
    Type: Application
    Filed: August 28, 2023
    Publication date: April 11, 2024
    Applicant: Jabil Inc.
    Inventors: Harpuneet Singh, Lei Hu, Ying-Chieh Huang, Wei-Hsiu Hsieh, Xiao-Ting Zheng, Chien-Cheng Chu, Tike Hoong Phua, Li Yun Chee
  • Publication number: 20240116724
    Abstract: A container feeding device includes a casing and first and second latch members. The casing defines a lower retaining space for receiving a plurality of containers that are stacked on one another. The first latch member is operable to enter the lower retaining space for supporting a bottommost container, or leave the lower retaining space to release the bottommost container. The second latch member enters the lower retaining space to support a second bottommost container when the bottommost container is released by the first latch member.
    Type: Application
    Filed: July 27, 2023
    Publication date: April 11, 2024
    Applicant: Jabil Inc.
    Inventors: Harpuneet Singh, Lei Hu, Ying-Chieh Huang, Wei-Hsiu Hsieh, Xiao-Ting Zheng, Chien-Cheng Chu, Arya Anil
  • Publication number: 20240091893
    Abstract: A mounting frame for being mounted with either one of first and second screwdrivers, includes a main frame, a mounting seat, and first and second mounting plates. The mounting seat has a plate attachment hole set. The first mounting plate has a first seat attachment hole set operable to be connected to the plate attachment hole set, and a first driver attachment hole set for the first screwdriver to be attached thereto. The second mounting plate has a second seat attachment hole set operable to be connected to the plate attachment hole set, and a second driver attachment hole set for the second screwdriver to be attached thereto.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 21, 2024
    Applicant: Jabil Inc.
    Inventors: Harpuneet Singh, Lei Hu, Ying-Chieh Huang, Wei-Hsiu Hsieh, Xiao-Ting Zheng, Chien-Cheng Chu
  • Publication number: 20240088307
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240071770
    Abstract: The present disclosure provides a manufacturing method of a semiconductor structure. The method includes: forming a conformal layer over a first patterned layer over a substrate; forming a second layer over the conformal layer and between portions of the first patterned layer; performing a first etching to form a second patterned layer and a patterned conformal layer; performing a second etching to remove a portion of the first patterned layer to form a first inclined member of the first patterned layer tapered away from the substrate and lining a vertical portion of the patterned conformal layer, and to remove a portion of the second patterned layer to form a second inclined member of the second patterned layer tapered away from the substrate and lining the vertical portion of the patterned conformal layer; and performing a third etching to remove the vertical portions of the patterned conformal layer.
    Type: Application
    Filed: June 30, 2023
    Publication date: February 29, 2024
    Inventors: ZHI-YI HUANG, YING-CHENG CHUANG, TSUNG-CHENG CHEN
  • Publication number: 20240071769
    Abstract: The present disclosure provides a manufacturing method of a semiconductor structure. The method includes: forming a conformal layer over a first patterned layer over a substrate; forming a second layer over the conformal layer and between portions of the first patterned layer; performing a first etching to form a second patterned layer and a patterned conformal layer; performing a second etching to remove a portion of the first patterned layer to form a first inclined member of the first patterned layer tapered away from the substrate and lining a vertical portion of the patterned conformal layer, and to remove a portion of the second patterned layer to form a second inclined member of the second patterned layer tapered away from the substrate and lining the vertical portion of the patterned conformal layer; and performing a third etching to remove the vertical portions of the patterned conformal layer.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Zhi-Yi HUANG, Ying-Cheng CHUANG, Tsung-Cheng CHEN
  • Publication number: 20160228584
    Abstract: A PET tracer for imaging tumors or neurological disorders that overexpress L-PGDS enzyme is provided. The present invention have prepared a glutathione conjugate of fluorine-18-labeled fluorobutyl ethacrynic amide using an acceptable amount of radioactivity that is capable of binding to L-PGDS and can be used for in vitro and in vivo imaging studies.
    Type: Application
    Filed: December 2, 2015
    Publication date: August 11, 2016
    Inventors: Kun-Ju LIN, Chun-Nan YEH, Ying-Cheng HUANG, Ho-Lien HUANG, Chung-Shan YU
  • Patent number: 8986652
    Abstract: The present invention provides a method of preparing [123I]Iodooctyl fenbufen amide with a radiochemical yield of 15%, a specific activity of 37 GBq/?mol and radiochemical purity of 95%. The present invention further provides a method of applying [123I]Iodooctyl fenbufen amide as tracer of single photon emission computer tomography (SPECT) to estimate the distribution of cyclooxygenase. By the binding characteristics of the iodine isotope-labeled compounds and the positive correlation of inflammation to tumor lesion, the present invention can estimate the tumor development and metastasis.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: March 24, 2015
    Assignee: National Tsing Hua University
    Inventors: Chung-Shan Yu, Ho-Lien Huang, Chun-Nan Yeh, Wei-Yuan Lee, Kang-Wei Chang, Ying-Cheng Huang, Kun-Ju Lin, Ching-Shiuann Yang, Shu-Fan Tien, Wen-Chin Su, Jenn-Tzong Chen, Wuu-Jyh Lin, Shiou-Shiow Farn
  • Publication number: 20140079633
    Abstract: The present invention provides a method of preparing [123I]Iodooctyl fenbufen amide with a radiochemical yield of 15%, a specific activity of 37 GBq/?mol and radiochemical purity of 95%. The present invention further provides a method of applying [123I]Iodooctyl fenbufen amide as tracer of single photon emission computer tomography (SPECT) to estimate the distribution of cyclooxygenase. By the binding characteristics of the iodine isotope-labeled compounds and the positive correlation of inflammation to tumor lesion, the present invention can estimate the tumor development and metastasis.
    Type: Application
    Filed: February 1, 2013
    Publication date: March 20, 2014
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Chung-Shan Yu, Ho-Lien Huang, Chun-Nan Yeh, Wei-Yuan Lee, Kang-Wei Chang, Ying-Cheng Huang, Kun-Ju Lin, Ching-Shiuann Yang, Shu-Fan Tien, Wen-Chin Su, Jenn-Tzong Chen, Wuu-Jyh Lin, Shiou-Shiow Farn