Patents by Inventor Ying-Chieh Chen

Ying-Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250014508
    Abstract: Disclosed are a display panel and a pixel circuit thereof. The pixel circuit includes a driving transistor, a data write-in circuit, a compensation circuit, a voltage control circuit, a light-emitting switch, and a light-emitting element. The driving transistor receives a power supply voltage. The data write-in circuit receives a first scanning signal, an emission signal, and a write-in data signal, stores the write-in data signal, and provides the write-in data signal to a control end of the driving transistor. The compensation circuit has a first switch and a second switch coupled to a relay end and controlled by a second scanning signal. The voltage control circuit adjusts a voltage difference between the control end of the driving transistor and the relay end. The light-emitting switch is coupled between a second end of the driving transistor and the light-emitting element, and is controlled by the emission signal.
    Type: Application
    Filed: June 17, 2024
    Publication date: January 9, 2025
    Applicant: AUO Corporation
    Inventors: Ying-Chieh Chen, Yung-Hsiang Lan
  • Patent number: 12184183
    Abstract: A flyback power converter includes: a first transistor switching a transformer for generating a primary switching current and an output voltage; and a second transistor generating a circulated current to achieve ZVS (zero voltage switching) of the first transistor; wherein the flyback power converter actively forces at least one switching cycle to be operated in a DCM (discontinuous conduction mode) operation when the primary switching current is determined to have been operating in a non-DCM operation for a predetermined number of switching cycles. The flyback power converter generates a demagnetized signal which emulates the demagnetized time of the transformer for controlling the second transistor during the non-DCM operation. The flyback power converter calibrates the demagnetized signal according to the demagnetized time during the actively fored DCM operation.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: December 31, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Ta-Yung Yang, Ying-Chieh Su, Yu-Chang Chen
  • Publication number: 20240427092
    Abstract: The present disclosure provides an optical module. The optical module includes an optical component disposed in or on a carrier and configured to receive a first light. The optical component is further configured to transmit a second light to a first portion of the carrier and transmit a third light to a second portion of the carrier.
    Type: Application
    Filed: September 10, 2024
    Publication date: December 26, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Shih-Chieh TANG, Lu-Ming LAI, Yu-Che HUANG, Ying-Chung CHEN
  • Publication number: 20240421269
    Abstract: A hidden display device and a method of manufacturing the same are provided. The hidden display device includes an appearance decorative structure, a light-emitting module and a signal control module. The appearance decorative structure includes an appearance decorative shell. The light-emitting module is covered by the appearance decorative structure. The appearance decorative shell has a plurality of micron-level through openings each having a maximum diameter between 5 ?m and 200 ?m. The minimum distance between any two adjacent micron-level through openings is between 50 ?m and 100 ?m. The light-emitting module includes a plurality of light-emitting units respectively correspond to the micron-level through openings.
    Type: Application
    Filed: December 3, 2023
    Publication date: December 19, 2024
    Inventors: YING-CHIEH CHEN, CHIEN-SHOU LIAO
  • Patent number: 12159567
    Abstract: A gamma tap circuit includes: (i) a first gamma division circuit configured to generate a first gamma tap voltage by performing voltage division of an upper gamma tap voltage and a lower gamma tap voltage, in-sync with a first clock signal CK1 and a first complementary clock signal CK1b, which is 180° out-of-phase relative to CK1, (ii) a second gamma division circuit configured to generate a second gamma tap voltage by performing voltage division of the upper gamma tap voltage and the first gamma tap voltage, in-sync with a second clock signal CK2 and a second complementary clock signal CK2b, which is 180° out-of-phase relative to CK2, and (iii) a third gamma division circuit configured to generate a third gamma tap voltage by performing voltage division of the first gamma tap voltage and the lower gamma tap voltage, in response to CK2 and CK2b, which have a lower frequency relative to CK1 and CK1b.
    Type: Grant
    Filed: September 14, 2023
    Date of Patent: December 3, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ying-Da Chang, Chulho Choi, Yu-Chieh Huang, Ching-Chieh Wu, Hajoon Shin, Zhen-Guo Ding, Jia-Way Chen, Kyunlyeol Lee, Yongjoo Song
  • Publication number: 20240397264
    Abstract: A patch-type bone conduction earphone for amplifying audio power includes a casing structure, a circuit substrate, a control module, an audio signal receiving module, a wireless signal transmission module, a bone conduction module and a power supply module. The audio signal receiving module is configured to receive an environmental audio signal. The wireless signal transmission module is configured for wirelessly receiving a predetermined audio signal. The bone conduction module is configured to convert the predetermined audio signal into a predetermined vibration signal. The circuit substrate, the control module, the audio signal receiving module, the wireless signal transmission module and the bone conduction module can cooperate with each other to form an electronic assembly structure that is able to be recycled, so that the electronic assembly structure can be configured to be used in a new patch-type bone conduction earphone through a recycling process or related processing steps.
    Type: Application
    Filed: August 1, 2024
    Publication date: November 28, 2024
    Inventors: CHIEN-SHOU LIAO, YING-CHIEH CHEN
  • Publication number: 20240379734
    Abstract: A semiconductor device includes a metal-insulator-metal (MIM) capacitor. The MIM capacitor includes: electrodes including one or more first electrodes and one or more second electrodes; and one or more insulating layers disposed between adjacent electrodes. The MIM capacitor is disposed in an interlayer dielectric (ILD) layer disposed over a substrate. The one or more first electrodes are connected to a side wall of a first via electrode disposed in the ILD layer, and the one or more second electrodes are connected to a side wall of a second via electrode disposed in the ILD layer. In one or more of the foregoing or following embodiments, the one or more insulating layers include a high-k dielectric material.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Chieh HSIAO, Hsiang-Ku SHEN, Yuan-Yang HSIAO, Ying-Yao LAI, Dian-Hau CHEN
  • Publication number: 20240370616
    Abstract: A critical path analysis method includes: obtaining multiple critical paths of a digital circuit; sorting the critical paths according to stage counts of the critical paths and dividing the critical paths into batches; using a simulation program with integrated circuit emphasis (SPICE) tool to analyze the batches sequentially to generate a static timing analysis (STA) report with respect to the critical paths.
    Type: Application
    Filed: April 28, 2024
    Publication date: November 7, 2024
    Inventors: Kuan-Han HO, Ying-Chieh CHEN, Mei-Li YU, Yu-Lan LO
  • Publication number: 20240371663
    Abstract: A temporary carrying substrate, a chip-transferring device and a chip transferring method are provided. The chip-transferring device includes a signal control module, a chip-carrying module and a chip-transferring module. The chip-transferring module is allowed to be configured to carry a temporary carrying substrate through the signal control module, and the temporary carrying substrate includes a plurality of micro heaters disposed thereinside or thereoutside. When the chip-transferring module needs to be configured to carry the temporary carrying substrate, a plurality of chips are arranged on a plurality of chip placement areas of the temporary carrying substrate and arranged in a predetermined arrangement shape. When the micro heater needs to be used, the micro heater is allowed to be configured to heat the temporary carrying substrate through the signal control module, thereby causing the temporary carrying substrate to generate thermal expansion to facilitate moving a corresponding one of the chips.
    Type: Application
    Filed: March 27, 2024
    Publication date: November 7, 2024
    Inventors: CHIEN-SHOU LIAO, YING-CHIEH CHEN
  • Publication number: 20240371920
    Abstract: A device structure, along with methods of forming such, are described. The device structure includes a structure, a first passivation layer disposed on the structure, a buffer layer disposed on the first passivation layer, a barrier layer disposed on a first portion of the buffer layer, a redistribution layer disposed over the barrier layer, an adhesion layer disposed on the barrier layer and on side surfaces of the redistribution layer, and a second passivation layer disposed on a second portion of the buffer layer. The second passivation layer is in contact with the barrier layer, the adhesion layer, and the redistribution layer.
    Type: Application
    Filed: July 20, 2024
    Publication date: November 7, 2024
    Inventors: Tsung-Chieh HSIAO, Hsiang-Ku SHEN, Yuan-Yang HSIAO, Ying-Yao LAI, Dian-Hau CHEN
  • Publication number: 20240371664
    Abstract: A chip transferring and bonding device includes a signal control module, a substrate carrying module, a chip transferring module and a chip bonding module. The substrate carrying module is configured to be electrically connected to the signal control module. The chip transferring module is configured to be electrically connected to the signal control module. The chip bonding module is configured to be electrically connected to the signal control module. The chip bonding module includes at least one micro heater, and the at least one micro heater of the chip bonding module is a light source generator configured for generating a light source or a heat source generator configured for generating a heat source. When the chip bonding module is optionally configured to be used, the micro heater of the chip bonding module can be allowed to heat a corresponding one of the chips through the signal control module.
    Type: Application
    Filed: April 3, 2024
    Publication date: November 7, 2024
    Inventors: CHIEN-SHOU LIAO, YING-CHIEH CHEN
  • Patent number: 12136885
    Abstract: A resonant half-bridge flyback power converter includes: a first transistor and a second transistor which form a half-bridge circuit; a transformer and a resonant capacitor connected in series and coupled to the half-bridge circuit; and a switching control circuit configured to generate a first driving signal and a second driving signal to control the first transistor and the second transistor respectively for switching the transformer to generate an output voltage. The first driving signal is configured to magnetize the transformer. The second driving signal includes at most one pulse between two consecutive pulses of the first driving signal. The switching control circuit generates a skipping cycle period when an output power is lower than a predetermined threshold. A resonant pulse of the second driving signal is skipped during the skipping cycle period. The skipping cycle period is increased in response to the decrease of the output power.
    Type: Grant
    Filed: February 8, 2024
    Date of Patent: November 5, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Ta-Yung Yang, Ying-Chieh Su, Yu-Chang Chen
  • Patent number: 12085768
    Abstract: The present disclosure provides an optical module. The optical module includes an optical component disposed in or on a carrier and configured to receive a first light. The optical component is further configured to transmit a second light to a first portion of the carrier and transmit a third light to a second portion of the carrier.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: September 10, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shih-Chieh Tang, Lu-Ming Lai, Yu-Che Huang, Ying-Chung Chen
  • Patent number: 12087742
    Abstract: A method for forming a film pattern includes: providing a substrate having a surface on which the film pattern is to be formed; providing a pattern material containing a hot-melt glue; providing a mask, wherein the mask includes a light-transmitting portion and a light-non-transmitting portion, wherein the pattern material is between the substrate and the mask; irradiating the mask by using a light source capable of generating heat, wherein the light generated by the light source passes through the light-transmitting portion, so that the pattern material under the light-transmitting portion is attached to the surface of the substrate by the melting of the hot-melt glue; and removing the mask and the pattern material under the light-non-transmitting portion.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: September 10, 2024
    Assignee: SKIILEUX ELECTRICITY INC.
    Inventor: Ying-Chieh Chen
  • Patent number: 12080753
    Abstract: A device structure, along with methods of forming such, are described. The device structure includes a structure, a first passivation layer disposed on the structure, a buffer layer disposed on the first passivation layer, a barrier layer disposed on a first portion of the buffer layer, a redistribution layer disposed over the barrier layer, an adhesion layer disposed on the barrier layer and on side surfaces of the redistribution layer, and a second passivation layer disposed on a second portion of the buffer layer. The second passivation layer is in contact with the barrier layer, the adhesion layer, and the redistribution layer.
    Type: Grant
    Filed: June 19, 2023
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Chieh Hsiao, Hsiang-Ku Shen, Yuan-Yang Hsiao, Ying-Yao Lai, Dian-Hau Chen
  • Patent number: 12068195
    Abstract: The present disclosure provides methods for forming conductive features in a dielectric layer without using adhesion layers or barrier layers and devices formed thereby. In some embodiments, a structure comprising a dielectric layer over a substrate, and a conductive feature disposed through the dielectric layer. The dielectric layer has a lower surface near the substrate and a top surface distal from the substrate. The conductive feature is in direct contact with the dielectric layer, and the dielectric layer comprises an implant species. A concentration of the implant species in the dielectric layer has a peak concentration proximate the top surface of the dielectric layer, and the concentration of the implant species decreases from the peak concentration in a direction towards the lower surface of the dielectric layer.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: August 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Li-Chieh Wu, Tang-Kuei Chang, Kuo-Hsiu Wei, Kei-Wei Chen, Ying-Lang Wang, Su-Hao Liu, Kuo-Ju Chen, Liang-Yin Chen, Huicheng Chang, Ting-Kui Chang, Chia Hsuan Lee
  • Publication number: 20240274653
    Abstract: A semiconductor device includes first and second metal-insulator-metal structures. The first metal-insulator-metal structure includes a first bottom conductor plate, a first portion of a first dielectric layer, a first middle conductor plate, a first portion of a second dielectric layer, and a first top conductor plate stacked up one over another. The second metal-insulator-metal structure includes a second bottom conductor plate, a second portion of the first dielectric layer, a second middle conductor plate, a second portion of the second dielectric layer, and a second top conductor plate stacked up one over another. In a cross-sectional view, the first bottom conductor plate is wider than the first middle conductor plate that is wider than the first top conductor plate, and the second bottom conductor plate is narrower than the second middle conductor plate that is narrower than the first top conductor plate.
    Type: Application
    Filed: April 15, 2024
    Publication date: August 15, 2024
    Inventors: Yuan-Yang Hsiao, Hsiang-Ku Shen, Tsung-Chieh Hsiao, Ying-Yao Lai, Dian-Hau Chen
  • Publication number: 20240238920
    Abstract: A recycling method for recyclable bone conduction earphones includes attaching a plurality of recyclable patch-type bone conduction earphones that run out of power to a recycling tape; packaging the recyclable patch-type bone conduction earphones that are attached to the recycling tape in a recycling bag; transporting the recycling bag containing the recyclable patch-type bone conduction earphones to a predetermined processing area; in the predetermined processing area, disassembling each recyclable patch-type bone conduction earphone to obtain a casing structure, an electronic assembly structure and a power supply module of each recyclable patch-type bone conduction earphone; and processing the casing structure, the electronic assembly structure and the power supply module of each recyclable patch-type bone conduction earphone, so that at least one of the casing structure, the electronic assembly structure and the power supply module is configured to be used in a new recyclable patch-type bone conduction ear
    Type: Application
    Filed: December 18, 2023
    Publication date: July 18, 2024
    Inventors: CHIEN-SHOU LIAO, YING-CHIEH CHEN
  • Publication number: 20240244165
    Abstract: A digital projector for generating projected images through timing control, which includes a light providing module, an image generating module, an optical component module and a projection lens module. The light providing module includes a plurality of light-emitting chip units that are configured to be turned on asynchronously within a predetermined time through timing control, thereby enabling the light providing module to generate a projection beam. The image generating module is configured to allow the projection beam to pass through, thereby converting the projection beam into an image beam. The projection lens module is configured to project the image beam to a predetermined position. The digital projector can generate projected images in a sequential control manner through the cooperation of the light providing module, the image generating module, the optical component module and the projection lens module.
    Type: Application
    Filed: December 28, 2023
    Publication date: July 18, 2024
    Inventors: CHIEN-SHOU LIAO, YING-CHIEH CHEN
  • Publication number: 20240244372
    Abstract: A recyclable patch-type bone conduction earphone includes a casing structure, a circuit substrate, a control module, an audio signal receiving module, a wireless signal transmission module, a bone conduction module and a power supply module. The audio signal receiving module is configured to receive an environmental audio signal. The wireless signal transmission module is configured for wirelessly receiving a predetermined audio signal. The bone conduction module is configured to convert the predetermined audio signal into a predetermined vibration signal. The circuit substrate, the control module, the audio signal receiving module, the wireless signal transmission module and the bone conduction module can cooperate with each other to form an electronic assembly structure that is able to be recycled, so that the electronic assembly structure can be configured to be used in a new recyclable patch-type bone conduction earphone through a recycling process or related processing steps.
    Type: Application
    Filed: December 18, 2023
    Publication date: July 18, 2024
    Inventors: CHIEN-SHOU LIAO, YING-CHIEH CHEN