Patents by Inventor Ying-Chieh Chiang
Ying-Chieh Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10452214Abstract: A manufacturing method of a single type touch panel structure includes steps as follows. A transparent metal oxide layer is configured on a substrate. The transparent metal oxide layer is patterned to form a first electrode pattern on the substrate. A transferable transparent conductive film is thermally laminated onto the first electrode pattern so that a photo sensitive layer is sandwiched between the transparent metal oxide layer and a transparent conductive coating layer. The transferable transparent conductive film is patterned for mutually forming a second electrode pattern on the transparent conductive coating layer and one surface of the photo sensitive layer adjoining the transparent conductive coating layer.Type: GrantFiled: June 19, 2017Date of Patent: October 22, 2019Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITEDInventors: Chun-Ming Chen, Ping-Yang Chen, Ying-Chieh Chiang, Tzu-Hsiang Lin, Chun-Ta Chen
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Publication number: 20190073052Abstract: The disclosure provides a touch panel having a touch sensing region and a peripheral circuit region. The touch panel includes a transparent substrate, a touch sensing layer, a first fanout circuit, and a second fanout circuit. The touch sensing layer is located above the transparent substrate and is disposed in the touch sensing region, in which the touch sensing layer has plural sensing units. The first fanout circuit is disposed in the peripheral circuit region. The second fanout circuit is disposed in the peripheral circuit region and is located above the first fanout circuit. The first fanout circuit and the second fanout circuit are electrically connected to the sensing units respectively. A projection of the first fanout circuit on the transparent substrate and a projection of the second fanout circuit on the transparent substrate at least partially overlap each other.Type: ApplicationFiled: October 15, 2017Publication date: March 7, 2019Inventors: Chin-Yuan CHEN, Ping-Yang CHEN, Ying-Chieh CHIANG, Tzu-Hsiang LIN
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Publication number: 20180232077Abstract: A manufacturing method of a single type touch panel structure includes steps as follows. A transparent metal oxide layer is configured on a substrate. The transparent metal oxide layer is patterned to form a first electrode pattern on the substrate. A transferable transparent conductive film is thermally laminated onto the first electrode pattern so that a photo sensitive layer is sandwiched between the transparent metal oxide layer and a transparent conductive coating layer. The transferable transparent conductive film is patterned for mutually forming a second electrode pattern on the transparent conductive coating layer and one surface of the photo sensitive layer adjoining the transparent conductive coating layer.Type: ApplicationFiled: June 19, 2017Publication date: August 16, 2018Inventors: Chun-Ming CHEN, Ping-Yang CHEN, Ying-Chieh CHIANG, Tzu-Hsiang LIN, Chun-Ta CHEN
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Patent number: 9535521Abstract: A touch panel includes a substrate, plural conducting wires, an insulating layer, and a ground layer. The substrate includes an active region and a peripheral region surrounding the active region. The conducting wires are disposed in the peripheral region and extend along a first direction. The insulating layer is disposed on the conductive wires. The ground layer is disposed at an edge of the peripheral region and at least partially on the insulating layer, and the ground layer is at least partially in contact with the substrate.Type: GrantFiled: November 28, 2014Date of Patent: January 3, 2017Assignees: INTERFACE OPTOELECTRONICS CORPORATION, GENERAL INTERFACE SOLUTION LIMITEDInventors: Chih-Peng Chang, Te-Jen Tseng, Ying-Chieh Chiang, Tzu-Hsiang Lin, Yen-Heng Huang
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Publication number: 20160147325Abstract: A touch module of a touch device defines a touch area and a trace area surrounding the touch area. The touch module includes a substrate, a number of first sensor electrodes, a number of second sensor electrodes, and a number of conductive traces. The number of first sensor electrodes and the number of second sensor electrodes are arranged in a first region on the substrate corresponding to the touch area. The number of conductive traces are arranged in a second region on the substrate corresponding to the trace area. At least one of the conductive traces includes at least two conductive layers.Type: ApplicationFiled: December 5, 2014Publication date: May 26, 2016Inventors: CHIA-CHUN TAI, YING-CHIEH CHIANG, TZU-HSIANG LIN, YEN-HENG HUANG
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Publication number: 20160147324Abstract: A touch panel includes a substrate, plural conducting wires, an insulating layer, and a ground layer. The substrate includes an active region and a peripheral region surrounding the active region. The conducting wires are disposed in the peripheral region and extend along a first direction. The insulating layer is disposed on the conductive wires. The ground layer is disposed at an edge of the peripheral region and at least partially on the insulating layer, and the ground layer is at least partially in contact with the substrate.Type: ApplicationFiled: November 28, 2014Publication date: May 26, 2016Inventors: Chih-Peng CHANG, Te-Jen TSENG, Ying-Chieh CHIANG, Tzu-Hsiang LIN, Yen-Heng HUANG
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Publication number: 20160147323Abstract: A method of manufacturing touch control panel structure includes providing a substrate. Then a transparent electrode layer is formed on a display area of the substrate. Next, a metal wiring layer is formed on a peripheral area of the substrate. The peripheral area surrounds the display area. Finally, the substrate is cut to form a touch control panel structure. A cutting line goes through the metal wiring layer, and an edge of the metal wiring layer is flushed against an edge of the substrate.Type: ApplicationFiled: November 28, 2014Publication date: May 26, 2016Inventors: Ying-Chieh CHIANG, Tzu-Hsiang LIN, Yen-Heng HUANG
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Patent number: 9247438Abstract: A searching method for finding a target location in a variable space is provided. The variable space is constructed by a set of variables and has multiple sub-spaces. The target location renders an output result of a wireless communication system to satisfy a target value. The search method includes steps of: providing the set of variables; identifying a target sub-space where the target location is located from the sub-spaces; obtaining a plurality of gradients of the output result at a predetermined location from the target sub-space, each of the gradients corresponding to a direction of change; and selecting one from the directions of change according to the gradients, and changing values of the set of variables according to the selected direction of change to find the target location.Type: GrantFiled: March 5, 2013Date of Patent: January 26, 2016Assignee: MStar Semiconductor, Inc.Inventors: Li-Wei Sheng, Ying-Chieh Chiang
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Patent number: 9013215Abstract: A signal processing apparatus includes: a signal conversion circuit, for performing a signal conversion operation on a reception signal to generate a first output signal according to a first clock signal, and performing the signal conversion operation on the reception signal according to a second clock signal to generate a second output signal; an amplitude adjustment circuit, coupled to the signal conversion circuit, for calculating an amplitude value of the reception signal according to the first output signal, and accordingly adjusting an amplitude of the reception signal; and a phase adjustment circuit, for adjusting a phase of the second clock signal according to the second output signal.Type: GrantFiled: August 15, 2013Date of Patent: April 21, 2015Assignee: MStar Semiconductor, Inc.Inventors: Chien-Sheng Chen, Shih-Chieh Yen, Chien-Shan Chiang, Ying-Chieh Chiang
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Publication number: 20140159788Abstract: A signal processing apparatus includes: a signal conversion circuit, for performing a signal conversion operation on a reception signal to generate a first output signal according to a first clock signal, and performing the signal conversion operation on the reception signal according to a second clock signal to generate a second output signal; an amplitude adjustment circuit, coupled to the signal conversion circuit, for calculating an amplitude value of the reception signal according to the first output signal, and accordingly adjusting an amplitude of the reception signal; and a phase adjustment circuit, for adjusting a phase of the second clock signal according to the second output signal.Type: ApplicationFiled: August 15, 2013Publication date: June 12, 2014Applicant: MStar Semiconductor, Inc.Inventors: CHIEN-SHENG CHEN, Shih-Chieh Yen, Chien-Shan Chiang, YING-CHIEH CHIANG
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Publication number: 20140045431Abstract: A searching method for finding a target location in a variable space is provided. The variable space is constructed by a set of variables and has multiple sub-spaces. The target location renders an output result of a wireless communication system to satisfy a target value. The search method includes steps of: providing the set of variables; identifying a target sub-space where the target location is located from the sub-spaces; obtaining a plurality of gradients of the output result at a predetermined location from the target sub-space, each of the gradients corresponding to a direction of change; and selecting one from the directions of change according to the gradients, and changing values of the set of variables according to the selected direction of change to find the target location.Type: ApplicationFiled: March 5, 2013Publication date: February 13, 2014Applicant: MSTAR SEMICONDUCTOR, INC.Inventors: Li-Wei Sheng, Ying-Chieh Chiang
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Patent number: 7903004Abstract: A decoding apparatus is disclosed. The decoding apparatus is applied to a data signal comprising a plurality of bits. A plurality of sampled data is generated by sampling the data signal. Each of the bits has a same cycle. The decoding apparatus comprises a calculating module and a determining module. When the calculating module sets a first interval and a second interval in the cycle of a specific bit, the calculating module generates a first count according to the sampled data in the first interval corresponding to a first logic level and generates a second count according to the sampled data in the second interval corresponding to a second logic level. The determining module determines a digital logic value of the specific bit.Type: GrantFiled: August 18, 2009Date of Patent: March 8, 2011Assignee: MSTAR Semiconductor, Inc.Inventors: Chiung Hung Chang, Ying-Chieh Chiang
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Publication number: 20110029735Abstract: A method for managing an embedded system is provided. The method includes selecting one of a first memory and a second memory according to at least one criterion, where the selected memory is a source from which the embedded system reads commands of a program, and an access speed of the first memory is different from that of the second memory; and controlling the embedded system to execute the program by utilizing the selected memory as the source.Type: ApplicationFiled: July 28, 2009Publication date: February 3, 2011Inventors: Ying-Chieh Chiang, Wei-Hsien Lin
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Publication number: 20100045492Abstract: A decoding apparatus is disclosed. The decoding apparatus is applied to a data signal comprising a plurality of bits. A plurality of sampled data is generated by sampling the data signal. Each of the bits has a same cycle. The decoding apparatus comprises a calculating module and a determining module. When the calculating module sets a first interval and a second interval in the cycle of a specific bit, the calculating module generates a first count according to the sampled data in the first interval corresponding to a first logic level and generates a second count according to the sampled data in the second interval corresponding to a second logic level. The determining module determines a digital logic value of the specific bit.Type: ApplicationFiled: August 18, 2009Publication date: February 25, 2010Applicant: MStar Semiconductor, Inc.Inventors: CHIUNG HUNG CHANG, YING-CHIEH CHIANG