Patents by Inventor YING-CHIEH PAN
YING-CHIEH PAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12210233Abstract: An electronic device includes a display panel and a viewing angle control unit disposed opposite to the display panel. The viewing angle control unit includes a first substrate; a second substrate disposed opposite to the first substrate; and a plurality of protrusions disposed between the first substrate and the second substrate, wherein a transmittance of the plurality of protrusions is between about 0.006% and about 1.6%.Type: GrantFiled: January 24, 2024Date of Patent: January 28, 2025Assignee: INNOLUX CORPORATIONInventors: I-Kai Pan, Su-Chen Yen, Ying-Chieh Tsai
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Patent number: 12174170Abstract: A biochip packaging structure includes a chip packaging layer, a redistribution layer, and a microfluidic channel. The chip packaging layer includes a resin layer including a biochip and a conductive pillar located on each of two sides of the biochip. The biochip includes a first surface flush with and exposed out of a side of the resin layer. A first end of the conductive pillar is flush with a side of the resin layer opposite the biochip. A second end of the conductive pillar is flush with the first surface of the biochip. The redistribution layer includes a metal winding electrically coupled to the biochip and the adjacent conductive pillar. The metal winding includes a first winding portion coupled to the biochip and a second winding portion coupled between the first winding portion and the conductive pillar. The second winding portion is parallel to the first surface.Type: GrantFiled: May 27, 2020Date of Patent: December 24, 2024Assignee: Kore Semiconductor Co., Ltd.Inventors: Hsiang-Hua Lu, Ying-Chieh Pan, Ching-Yu Ni
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Patent number: 12176615Abstract: An electronic device is provided, and the manufacturing method of which is to stack a carrier structure on a circuit board having a reflector via a plurality of conductive elements, dispose a micro strip and an antenna layer communicatively connected to the reflector respectively on opposite sides of the carrier structure, dispose an antenna spacer on the carrier structure, cover the antenna spacer with an encapsulation layer, and form an antenna portion communicatively connected to the antenna layer on the encapsulation layer. Therefore, a better antenna performance can be obtained by disposing the micro strip on the bottom layer of the carrier structure and disposing the antenna layer on the top layer of the carrier structure.Type: GrantFiled: November 3, 2022Date of Patent: December 24, 2024Assignee: KORE SEMICONDUCTOR CO., LTD.Inventors: Ying-Chieh Pan, Hsiang-Hua Lu, Chi-Ting Huang
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Publication number: 20230132846Abstract: An electronic device is provided, and the manufacturing method of which is to stack a carrier structure on a circuit board having a reflector via a plurality of conductive elements, dispose a micro strip and an antenna layer communicatively connected to the reflector respectively on opposite sides of the carrier structure, dispose an antenna spacer on the carrier structure, cover the antenna spacer with an encapsulation layer, and form an antenna portion communicatively connected to the antenna layer on the encapsulation layer. Therefore, a better antenna performance can be obtained by disposing the micro strip on the bottom layer of the carrier structure and disposing the antenna layer on the top layer of the carrier structure.Type: ApplicationFiled: November 3, 2022Publication date: May 4, 2023Inventors: Ying-Chieh PAN, Hsiang-Hua LU, Chi-Ting HUANG
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Patent number: 11581260Abstract: A package structure includes a first chip, a first redistribution layer, a second chip, a second redistribution layer, a third redistribution layer, a carrier, and a first molding compound layer. The first redistribution layer is arranged on a surface of the first chip. The second redistribution layer is arranged on a surface of the second chip. The third redistribution layer interconnects the first redistribution layer and the second redistribution layer. The carrier is arranged on a side of the third redistribution layer away from the first redistribution layer and the second redistribution layer. The first molding compound layer covers the first chip, the first redistribution layer, the second chip, and the second redistribution layer. A manufacturing method is also disclosed.Type: GrantFiled: November 13, 2020Date of Patent: February 14, 2023Assignee: Kore Semiconductor Co., Ltd.Inventors: Chi-Ting Huang, Ching-Yu Ni, Hsiang-Hua Lu, Ying-Chieh Pan
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Publication number: 20220344277Abstract: A fan-out packaging structure includes a redistribution layer and a positioning sheet formed on the redistribution layer. The positioning sheet defines at least one opening penetrating opposite sides of the positioning sheet. At least one chip is mounted in the at least one opening. The redistribution layer comprises at least one conductive circuit. The at least one chip is electrically coupled to a corresponding one conductive circuit.Type: ApplicationFiled: July 8, 2022Publication date: October 27, 2022Inventors: YING-CHIEH PAN, HSIANG-HUA LU, CHING-YU NI
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Patent number: 11462481Abstract: A fan-out packaging structure includes a redistribution layer and a positioning sheet formed on the redistribution layer. The positioning sheet defines at least one opening penetrating opposite sides of the positioning sheet. At least one chip is mounted in the at least one opening. The redistribution layer comprises at least one conductive circuit. The at least one chip is electrically coupled to a corresponding one conductive circuit.Type: GrantFiled: July 23, 2020Date of Patent: October 4, 2022Assignee: Kore Semiconductor Co., Ltd.Inventors: Ying-Chieh Pan, Hsiang-Hua Lu, Ching-Yu Ni
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Publication number: 20220122917Abstract: A package structure includes a first chip, a first redistribution layer, a second chip, a second redistribution layer, a third redistribution layer, a carrier, and a first molding compound layer. The first redistribution layer is arranged on a surface of the first chip. The second redistribution layer is arranged on a surface of the second chip. The third redistribution layer interconnects the first redistribution layer and the second redistribution layer. The carrier is arranged on a side of the third redistribution layer away from the first redistribution layer and the second redistribution layer. The first molding compound layer covers the first chip, the first redistribution layer, the second chip, and the second redistribution layer. A manufacturing method is also disclosed.Type: ApplicationFiled: November 13, 2020Publication date: April 21, 2022Inventors: CHI-TING HUANG, CHING-YU NI, HSIANG-HUA LU, YING-CHIEH PAN
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Publication number: 20220032292Abstract: A method for making a biochip structure, includes: providing a substrate and forming a plurality of biochips on a surface of the substrate; forming a carrier on a side of the substrate having the biochips, defining a plurality of through holes in the substrate from a side of the substrate away from the carrier; and filling conductive material in each of the through holes to connect one of the biochips. The carrier defines a plurality of openings. Each opening cooperates with substrate to form a micro-channel, and one of the biochips is exposed in the micro-channel.Type: ApplicationFiled: November 13, 2020Publication date: February 3, 2022Inventors: HSIANG-HUA LU, CHING-YU NI, YING-CHIEH PAN
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Publication number: 20210313244Abstract: A fingerprint identification chip package of reduced thickness in not requiring a supporting substrate includes a packaging material layer, a fingerprint identification chip in the packaging material layer, conductive pillars in the packaging material layer for structural support, the pillars being spaced apart from the fingerprint identification chip, and a redistribution layer on a side of the packaging material layer. The redistribution layer includes connecting wires, each wire is electrically coupled between the fingerprint identification chip and one conductive pillar. A plurality of pins is on a side of the packaging material layer opposite to the redistribution layer, each pin is electrically coupled to one conductive pillar.Type: ApplicationFiled: August 25, 2020Publication date: October 7, 2021Inventors: HSIANG-HUA LU, YING-CHIEH PAN, CHING-YU NI
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Publication number: 20210154666Abstract: A biochip packaging structure includes a chip packaging layer, a redistribution layer, and a microfluidic channel. The chip packaging layer includes a resin layer including a biochip and a conductive pillar located on each of two sides of the biochip. The biochip includes a first surface flush with and exposed out of a side of the resin layer. A first end of the conductive pillar is flush with a side of the resin layer opposite the biochip. A second end of the conductive pillar is flush with the first surface of the biochip. The redistribution layer includes a metal winding electrically coupled to the biochip and the adjacent conductive pillar. The metal winding includes a first winding portion coupled to the biochip and a second winding portion coupled between the first winding portion and the conductive pillar. The second winding portion is parallel to the first surface.Type: ApplicationFiled: May 27, 2020Publication date: May 27, 2021Inventors: HSIANG-HUA LU, YING-CHIEH PAN, CHING-YU NI
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Publication number: 20210134732Abstract: A fan-out packaging structure includes a redistribution layer and a positioning sheet formed on the redistribution layer. The positioning sheet defines at least one opening penetrating opposite sides of the positioning sheet. At least one chip is mounted in the at least one opening. The redistribution layer comprises at least one conductive circuit. The at least one chip is electrically coupled to a corresponding one conductive circuit.Type: ApplicationFiled: July 23, 2020Publication date: May 6, 2021Inventors: YING-CHIEH PAN, HSIANG-HUA LU, CHING-YU NI