Abstract: A method for forming an indium gallium nitride quantum well structure is disclosed. The method includes forming a gallium nitride microdisk on a substrate, with the gallium nitride microdisk having an inverted pyramid form and an end face; and forming multiple quantum well layers on the end face, with each quantum well layer including an indium gallium nitride quantum well and a barrier layer. The indium gallium nitride quantum well is grown at a growth temperature adjusted using a trend equation within a temperature range of 480° C. to 810° C.

Abstract: A wireless charging control method and a wireless charging system employing the same are provided. The wireless charging control method is applicable for the wireless charging system including a transmitter module and a receiver module and includes steps of: (a) by the transmitter module, when an input power is higher than a threshold power or a component temperature is higher than a threshold temperature, determining a target output power according to the input power or the component temperature; (b) by the transmitter module, modulating information of the target output power into an input electric energy; (c) by the receiver module, receiving and sampling the input electric energy to demodulate the information of the target output power; and (d) by the receiver module, converting the input electric energy into the target output power according to the information of the target output power.

Abstract: An antenna device includes antennas to receive and transmit signals; and a processor to divide radiation patterns of combinations of the antennas into a predetermined number of characteristic patterns, and to calculate similarities of the characteristic patterns and a RSSI of each of the characteristic patterns. When the antenna device is in operation, the processor reads and analyzes RSSI of the signals received by the antennas, compares the RSSI of the signals of the antennas with the RSSI of the characteristic patterns, and determines a matched characteristic pattern group according to results of comparisons and the similarities of the characteristic patterns.

Abstract: A method for manufacturing an indium gallium nitride quantum well is disclosed. The method includes providing a substrate in a process chamber, with the substrate including a gallium nitride layer. Having the process chamber reach a process vacuum. Providing a nitrogen molecular beam in plasma state, an indium molecular beam and an aluminum molecular beam into the process chamber simultaneously, controlling a flow rate ratio of the indium molecular beam to the aluminum molecular beam, and forming an indium aluminum nitride film on the gallium nitride layer, with the flow rate ratio being 0.6, 1.0, 1.29, 1.67 or 3.0. Forming an indium gallium nitride quantum well on the indium aluminum nitride film.

Abstract: An apparatus includes a chamber, a pedestal configured to receive and support a semiconductor wafer in the chamber, and an edge ring disposed over the pedestal. The edge ring includes a first portion having a first top surface, a second portion coupled to the first portion and having a second top surface lower than the first top surface, and a recess defined in the first portion. The second top surface is under the semiconductor wafer. The recess has a depth, and a distance between the pedestal and an inner surface of the recess is substantially equal to the depth of the recess.

Abstract: A charging load detection circuit includes a charging circuit, a frequency generation unit, and a control unit. The control unit controls the frequency generation unit to generate a pulse voltage with a fixed first frequency and a fixed first amplitude, and the frequency generation unit provides the pulse voltage to an output terminal of the charging circuit. The control unit detects whether a load is coupled to the output terminal by detecting whether the first frequency and the first amplitude are varied, and controls connecting or disconnecting a charging path of the charging circuit according to whether the load is coupled to the output terminal.

Abstract: An antenna device includes antennas to receive and transmit signals; and a processor to divide radiation patterns of combinations of the antennas into a predetermined number of characteristic patterns, and to calculate similarities of the characteristic patterns and a RSSI of each of the characteristic patterns. When the antenna device is in operation, the processor reads and analyzes RSSI of the signals received by the antennas, compares the RSSI of the signals of the antennas with the RSSI of the characteristic patterns, and determines a matched characteristic pattern group according to results of comparisons and the similarities of the characteristic patterns.

Abstract: An antenna device includes a first antenna group comprising multiple antennas, configured to receive and transmitting signals; a second antenna group comprising multiple antennas, configured to receive and transmitting signals; a processor coupled to the first antenna group by a first electronic switch, coupled to the second antenna group by a second electronic switch, configured to divide radiation pattern of antenna combination of the first antenna group and the second antenna group into a predetermined number of characteristic patterns, and further configured to calculate similarities of the characteristic patterns and the RSSI of each characteristic pattern; wherein when the antenna device is in operation, the processor reads and analyzes RSSI of the signals, and compares with the RSSI of the characteristic patterns, and then determines the matched characteristic pattern group according to results of the comparisons and the similarities of the characteristic patterns.

Abstract: An apparatus includes a chamber, a pedestal configured to receive and support a semiconductor wafer in the chamber, and an edge ring disposed over the pedestal. The edge ring includes a first portion having a first top surface, a second portion coupled to the first portion and having a second top surface lower than the first top surface, and a recess defined in the first portion. The second top surface is under the semiconductor wafer. The recess has a depth, and a distance between the pedestal and an inner surface of the recess is substantially equal to the depth of the recess.

Abstract: An antenna device includes a first antenna group comprising multiple antennas, configured to receive and transmitting signals; a second antenna group comprising multiple antennas, configured to receive and transmitting signals; a processor coupled to the first antenna group by a first electronic switch, coupled to the second antenna group by a second electronic switch, configured to divide radiation pattern of antenna combination of the first antenna group and the second antenna group into a predetermined number of characteristic patterns, and further configured to calculate similarities of the characteristic patterns and the RSSI of each characteristic pattern; wherein when the antenna device is in operation, the processor reads and analyzes RSSI of the signals, and compares with the RSSI of the characteristic patterns, and then determines the matched characteristic pattern group according to results of the comparisons and the similarities of the characteristic patterns.

Abstract: A charging load detection circuit includes a charging circuit, a frequency generation unit, and a control unit. The control unit controls the frequency generation unit to generate a pulse voltage with a fixed first frequency and a fixed first amplitude, and the frequency generation unit provides the pulse voltage to an output terminal of the charging circuit. The control unit detects whether a load is coupled to the output terminal by detecting whether the first frequency and the first amplitude are varied, and controls connecting or disconnecting a charging path of the charging circuit according to whether the load is coupled to the output terminal.

Abstract: A method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid is provided to improve upon the complexity of the conventional method for manufacturing light-emitting diode die. The method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid includes performing a first epitaxial reaction and then a second epitaxial reaction on a substrate under 600-650° C. to form a gallium nitride pyramid, growing an first indium gallium nitride layer on an end face of the gallium nitride pyramid, where the end face is away from the substrate, and growing a first gallium nitride layer on the first indium gallium nitride layer. A flux ratio of nitrogen to gallium of the first epitaxial reaction is 25:1-35:1, and a flux ratio of nitrogen to gallium of the second epitaxial reaction is 130:1-150:1.

Abstract: A method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid is provided to improve upon the complexity of the conventional method for manufacturing light-emitting diode die. The method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid includes performing a first epitaxial reaction and then a second epitaxial reaction on a substrate under 600-650° C. to form a gallium nitride pyramid, growing an first indium gallium nitride layer on an end face of the gallium nitride pyramid, where the end face is away from the substrate, and growing a first gallium nitride layer on the first indium gallium nitride layer. A flux ratio of nitrogen to gallium of the first epitaxial reaction is 25:1-35:1, and a flux ratio of nitrogen to gallium of the second epitaxial reaction is 130:1-150:1.

Abstract: This invention discloses a light emitting element to solve the problem of lattice mismatch and inequality of electron holes and electrons of the conventional light emitting elements. The light emitting element comprises a gallium nitride layer, a gallium nitride pyramid, an insulating layer, a first electrode and a second electrode. The gallium nitride pyramid contacts with the gallium nitride layer, with a c-axis of the gallium nitride layer opposite in direction to a c-axis of the gallium nitride pyramid, and with an M-plane of the gallium nitride layer parallel to an M-plane of the gallium nitride pyramid, with broken bonds at the mounting face of the gallium nitride layer and the larger end face of the gallium nitride pyramid welded with each other, with the gallium nitride layer and the gallium nitride pyramid being used as a p-type semiconductor and an n-type semiconductor respectively.

Abstract: This invention discloses a light emitting element to solve the problem of lattice mismatch and inequality of electron holes and electrons of the conventional light emitting elements. The light emitting element comprises a gallium nitride layer, a gallium nitride pyramid, an insulating layer, a first electrode and a second electrode. The gallium nitride pyramid contacts with the gallium nitride layer, with a c-axis of the gallium nitride layer opposite in direction to a c-axis of the gallium nitride pyramid, and with an M-plane of the gallium nitride layer parallel to an M-plane of the gallium nitride pyramid, with broken bonds at the mounting face of the gallium nitride layer and the larger end face of the gallium nitride pyramid welded with each other, with the gallium nitride layer and the gallium nitride pyramid being used as a p-type semiconductor and an n-type semiconductor respectively.

Abstract: A method for manufacturing a light emitting element is disclosed. A larger end face of a gallium nitride pyramid contacts with a mounting face of a gallium nitride layer disposed on a substrate, with c-axes of the gallium nitride layer and the gallium nitride pyramid coaxial to each other, and with M-planes of the gallium nitride layer and the gallium nitride pyramid parallel to each other. Broken bonds at contact faces of the gallium nitride pyramid and of the gallium nitride layer weld with each other after heating and cooling. A portion of an insulating layer coated on the gallium nitride pyramid and is removed to form an electrically conductive portion on which a first electrode is disposed. A portion of the insulating layer coated on the gallium nitride layer is removed to form another electrically conductive portion on which a second electrode is disposed.

Abstract: A light emitting element and its manufacturing method are disclosed. A larger end face of a gallium nitride pyramid contacts with a mounting face of a gallium nitride layer disposed on a substrate, with c-axes of the gallium nitride layer and the gallium nitride pyramid coaxial to each other, and with M-planes of the gallium nitride layer and the gallium nitride pyramid parallel to each other. Broken bonds at contact faces of the gallium nitride pyramid and of the gallium nitride layer weld with each other after heating and cooling. A portion of an insulating layer coated on the gallium nitride pyramid and is removed to form an electrically conductive portion on which a first electrode is disposed. A portion of the insulating layer coated on the gallium nitride layer is removed to form another electrically conductive portion on which a second electrode is disposed.

Abstract: The present invention provides a method for fabricating an indium(In)-111 radioactive isotope. A target of cadmium(Cd)-112 is processed through steps of dissolving with heat, absorbing, washing, desorbing and drying for obtaining the In-111 radioactive isotope. Thus, chemical separation is coordinated with the target for fabricating the In-111 radioactive isotope with high efficiency and low cost for production procedure.

Abstract: The present invention provides a method for fabricating an indium(In)-111 radioactive isotope. A target of cadmium(Cd)-112 is processed through steps of dissolving with heat, absorbing, washing, desorbing and drying for obtaining the In-111 radioactive isotope. Thus, chemical separation is coordinated with the target for fabricating the In-111 radioactive isotope with high efficiency and low cost for production procedure.

Abstract: An output voltage detecting circuit includes a conducting structure, a voltage regulator, a first resistor and a second resistor. The conducting structure includes a power output return terminal, a first contact and a second contact. A compensating voltage is generated between the first and second contacts when an output current flows through the first and second contacts. The voltage regulator adjusts a first current according to a voltage across a first circuit terminal and the ground terminal of the voltage regulator, thereby generating a detecting signal according to the first current. An output voltage across the positive power output terminal and the power output return terminal is subject to voltage division by the first and second resistors to generate a divided voltage. The voltage across the first circuit terminal and the ground terminal of the voltage regulator is equal to a difference between the divided voltage and the compensating voltage.