Abstract: A method for accessing a memory is provided. The method includes entering a memory accessing mode for updating a top of low memory (TOLM) value stored in a TOLM register in a chipset of a system with a highest memory address when a memory accessing command is received. The memory accessing command requests the utilization of a memory block in a memory of the system corresponding to an address space occupied by a memory-mapped input output (MMIO) function. The system then accesses the corresponding memory block in the memory according to the address space recorded in the memory accessing command. After the access is completed, the memory accessing mode is closed and the original TOLM value is written back to the TOLM register. Therefore, the present invention can access the “MMIO memory block” to prevent a waste of the memory.

Abstract: A method and system for updating a boot block of a Basic Input/Output System (BIOS) program in an electronic device to prohibit write processes to the boot block while realizing update of contents stored therein. First, at least one content segment that requires update is recorded in an initialization content stored in the boot block of the BIOS program. The content segment defines a data storage address for storing update data associated with the content segment. Then, at least one update block of the BIOS program is established for storing at least an update data, the update data being stored according to the data storage address defined by the content segment in the boot block of the BIOS program. When the electronic device is turned on, initialization is performed using the update data obtained from the update block of the BIOS program based on the data storage address defined by the content segment.

Abstract: A method for conserving system resources applicable to an electronic system with a BIOS, a first memory unit and a second memory unit is proposed. The electronic system is connected to a riser card with a plurality of slots disposed thereon for receiving a plurality of slot cards. The method allows bridges corresponding to slots of a riser card that have slot cards inserted therein to be enabled, and those bridges corresponding to empty slots of a riser card not to be enabled. This information is recorded in the first memory unit. When the BIOS performs a Plug-and-Play (PnP) algorithm, the bridges that are not enabled are hidden away and cannot be accessed by a bus interface cycle. Thus, system resources such as interrupt request (IRQ), input/output (IO) and memory-mapped input/output (MMIO) are assigned only to the enabled bridges, conserving the system resources.

Abstract: A method for initiating a system is provided. In the present invention, a specific data, which is not used for executing an initiating program of an interface device, is moved from a conventional memory to an extended memory temporarily, such that the available space of the conventional memory is increased. As a result, the computer system can have enough conventional memory space for loading and executing the initiating program of the interface device during a Power-On Self Test (POST) so as to achieve the purpose of initiating the system.

Abstract: The present invention discloses a method for supporting a riser card by a basic input/output system (BIOS), which is implemented to the BIOS installed on a motherboard and having a plurality of configuration information corresponding to a plurality of resource information respectively and comprises the steps of performing a power-on self test; reading at least one resource information of the riser card installed on the motherboard and an interface card inserted into each slot of the riser card; obtaining the configuration information corresponding to the resource information in the BIOS based on the resource information of the riser card and the interface card; and providing the configuration information obtained to an operating system for enabling the riser card according to the configuration information.

Abstract: A data protection method of a storage device, applied in a computer having a storage device, is provided. The storage device is consisted of a plurality of blocks. The method includes the following steps. When a data containing a plurality of bit data is stored in the storage device in the computer, the stored bit data is checked bit by bit. If an incorrect bit data is checked, the data in the block containing the incorrect bit data is backed up to a reserved block. Therefore, the memory capacity of the storage device is not occupied while backing up data, so as to improve the reliability of the computer.

Abstract: The present invention discloses a method for protecting data in a hard disk, which is applied to the hard disk, such that if a computer executes boot codes of the hard disk and a hard disk identification code recorded by the hard disk is determined to be identical to a computer identification code stored in a computer, the hard disk can be read, which subsequently allows an operating system to be initialized, or else the content in a partition table area will be cleared and the hard disk cannot be read, thus the initialization of the operating system cannot be completed.

Abstract: The present invention discloses a method for protecting data in a hard disk, such that when a computer executes a power-on self test (POST) of a basic input/output system (BIOS), completes initialization of memories and calls an interrupt routine of the BIOS to read a hard disk area after initialization program codes of interface devices of all hard disk are executed, the computer will determine whether or not the hard disk has added a protection description data with a portion that matches with a computer identification code of the computer before accessing data in the hard disk.

Abstract: A data protection method of a storage device is provided. In the method, a system management interrupt program orders a hardware control unit to obtain a type and an address message of an error in a block in a first storage device, and stores the type and address message in a second storage device. An interrupt service routine (ISR) reads the type and address message of the error from the second storage device. The ISR orders an operating system to search for a block that may be accessed normally and not damaged in the first storage device, and sets the block as a reserved block. The ISR transmits the address message of the error to the OS, such that the OS copies the data in the block having the error to the reserved block, thereby increasing the available capacity of the storage device and improving the reliability of the computer.

Abstract: A method and a system for automatically diagnosing disability of computer peripheral devices are provided. In the method, a set of interrupt configuration data relevant to a disabled PCI peripheral device, including relevant setting values of a hardware IRQ routing, is input and compared with a PCI IRQ routing table pre-stored in a boot control unit. Then, whether errors exist in the current setting values of the relevant control parameters and flags of all the relevant control units are automatically checked. If an incorrect setting value is found, a corresponding diagnosis result message is displayed for informing the user to make a modification. Therefore, users can know the reasons that cause the computer peripheral device to operate abnormally and make the modification quickly and effectively.

Abstract: A method for dynamically allocating interrupt pins is provided. The present method is used for allocating a plurality of interrupt pins of a control chip. In the present method, a hardware routing table is read first and a plurality of slots that have used the interrupt pins is found out from the hardware routing table. These slots are sorted according to the number of interrupt pins used by each slot. Then, from the slot in the first order of the sequence, the interrupt pins are allocated for a plurality of registers in the control chip corresponding to these slots by turns. The allocation is repeated once the last interrupt pin is allocated until all the registers for the slots are allocated with an interrupt pin.

Abstract: A method for reading input/output port data is provided. In the present method, a write trap procedure is enabled so that the data is stored in a buffer first when there is data to be written in the input/output port. Then, a read trap procedure is enabled so that the data stored in the buffer is read out and used as the data of the input/output port when there is a need to read the data of the input/output port. Therefore, the defect in the prior art that the basic input/output system (BIOS) in a direct input/output mode can only be written in but cannot be read out is resolved.

Abstract: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a configuration data exchange path between a memory control chip and an I/O control chip on the server's motherboard, so as to allow a set of memory specification data stored in an I/O configuration register of the ICH I/O control chip to be mapped via the configuration data exchange path to a memory configuration register of the memory control chip, such that a memory access action can be performed based on the memory specification data mapped from the I/O control chip. This feature allows the operation and network management of servers to be made more efficient.

Abstract: In a method of integrating image and release note of BIOS, a memory space such as flash ROM used for storing machine codes of the BIOS is planned at least one independent block with a specific length, and each block is used for storing a release note of the BIOS. All release notes of the BIOS are compiled into at least one independent binary module, and the binary module is compressed according to actual requirements. In the process of building the BIOS, the compressed binary module is placed in the image of the BIOS, and the image of the BIOS is written into each block. When a setup utility of the BIOS is executed, all release notes of the BIOS can be displayed through an output device, so that a user can select and search a related item of each release note through an input device such as a keyboard.

Abstract: A method for executing the power on self test (POST) on the computer system and a method for updating the SMBIOS information partially are provided for a computer system with a first memory and a second memory, wherein the first memory comprises a first storage block and a second storage block. A user can previously set the specific SMBIOS information in the second storage block. And during the POST stage, the default SMBIOS information in the BIOS code loaded from the first storage block to the second memory will be partially updated according to the specific SMBIOS information set by the user. As a result, the purpose of using the appropriated SMBIOS information to initiate the computer system can be achieved.

Abstract: The present invention discloses a method for supporting a riser card by a basic input/output system (BIOS), which is implemented to the BIOS installed on a motherboard and having a plurality of configuration information corresponding to a plurality of resource information respectively and comprises the steps of performing a power-on self test; reading at least one resource information of the riser card installed on the motherboard and an interface card inserted into each slot of the riser card; obtaining the configuration information corresponding to the resource information in the BIOS based on the resource information of the riser card and the interface card; and providing the configuration information obtained to an operating system for enabling the riser card according to the configuration information.

Abstract: The present invention is to provide a method of solving BIST (Build-in Self Test) failure of CPU (Central Process Unit) by means of BIOS (Basic Input/Output System) and maximizing system performance, which includes the steps of setting a flag representing each of the available CPUs in an MPS (multi-processor specification) table and an ACPI (advanced configuration power interface) table provided by the BIOS of a computer so as to inform OS (operation system) which logical CPUs are not BIST failure and available to be utilized by the OS. Therefore, the OS can fully utilize all logical CPUs passing the BIST so as to completely solve problems associated with BIST failure of CPU and maximize the performance of the computer system without involving any additional hardware circuit and setting a whole physical CPU as being disabled.

Abstract: A method for indicating the actual progress of a booting procedure obtains a time value required for completing a booting of a computer device and indicates a plurality of progress units sequentially filled into a progress indicating unit within the time value. An apparatus adopting this method includes a screen for displaying a progress indicating unit having a plurality of progress units; a timer for issuing an interrupt signal according to a cycle, and any interrupt signal can issue a display instruction to accumulate at least one progress unit in the progress indicating unit; a memory for storing a BIOS initialization procedure and a time value; a processor for reading the time value and the resolution of the screen to compute a display frequency for sequentially displaying the progress units on the progress indicating unit and sequentially displaying the progress units on the screen according to the display frequency.

Abstract: A computer platform automatic testing method and system is proposed, which is designed for use in conjunction with a computer platform for performing an automatic testing procedure on a computer-dedicated circuit unit installed on the computer platform, and which is characterized by the capability of performing an automatic testing procedure on a computer-dedicated circuit unit based on a user-specified set of hardware specification data about the computer platform and circuit unit under test, and the capability of automatically generating a test report that lists related data about each faulted part of the circuit unit being tested. This feature allows hardware engineers to more conveniently and efficiently correct faulted parts in the circuit unit being tested.

Abstract: An inter-module data communication control method and system for ACPI (Advanced Configuration and Power Interface) and BIOS (Basic Input/Output System) is proposed, which is designed for use with a computer platform for providing an inter-module data communication control mechanism, which is characterized by the use of SMI (System Management Interrupt) for the ACPI to communicate with the BIOS of the computer platform. This feature allows BIOS engineers to modify or upgrade ACPI functionality without having to modify any ASL/AML (ACPI Source Language, ACPI Machine Language) code, such that the ACPI development can be more convenient and efficient than prior art.