Abstract: An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.

Abstract: A PCB layout structure for suppressing EMI and a method thereof is disclosed. The PCB layout structure for suppressing EMI includes a multi-layer PCB, a plurality of electric grids, and a plurality of conductive vias. The multi-layer PCB has a plurality of signal layers and a grounding layer. Each of the signal layers is disposed with a plurality of signal lines. The plurality of electric grids are disposed on each of the signal layers and cover the signal lines on each of the signal layers. The plurality of conductive vias are located between the layers of the multi-layer PCB to electrically connect the grounding layer with the electric grids on each of the signal layers. Thereby, electromagnetic waves of a specific wavelength are shielded by appropriately choosing the dimensions of the electric grids.