Patents by Inventor Ying-Hsi Lin

Ying-Hsi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8581562
    Abstract: The present invention relates to a Single Inductor Double Output (SIDO) power converter, which includes a power-stage circuit, a current detector, a slope compensation device, at least two error amplifiers, a comparing unit, a mode exchange circuit, a logical device and a driver. The SIDO current converter achieves an optimal SIDO power converting efficiency by controlling a full-current mode. Furthermore, different power transferring modes, under a variety of loadings, are used to address the issue of cross regulation and at meanwhile solving output voltage ripples and transient response to ensure the SIDO power converter a more flexible usage environment and better output performance.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: November 12, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ke-Horng Chen, Yu-Huei Lee, Shih-Jung Wang, Yao-Yi Yang, Ying Hsi Lin
  • Publication number: 20130278320
    Abstract: A mixer includes a transformer and a mixing circuit. The transformer is employed for receiving an input signal to generate a differential output. The mixing circuit is coupled to the transformer, and employed for mixing the differential output with N oscillating signals having different phases to generate a plurality of mixed output signals, wherein N is greater than 2.
    Type: Application
    Filed: September 11, 2012
    Publication date: October 24, 2013
    Inventors: Hsien-Ku Chen, Chia-Jun Chang, Ka-Un Chan, Ying-Hsi Lin
  • Patent number: 8515379
    Abstract: An adjusting method for reducing local oscillation leakage or I/Q mismatch in a receiver includes the steps of: (a) detecting a current extent of local oscillation leakage or I/Q mismatch; (b) determining if an adjusting direction is correct with reference to the current extent of local oscillation leakage or I/Q mismatch thus detected, maintaining the adjusting direction if correct, and reversing the adjusting direction upon determining that the adjusting direction is incorrect; and (c) adjusting a control signal according to the adjusting direction.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: August 20, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Hong-Ta Hsu, Ying-Hsi Lin
  • Patent number: 8400227
    Abstract: A clock generator is provided, capable of automatically adjusting an output clock when process, voltage, or temperature variation occurs. The clock generator includes a current generator, for generating a first current and a second current according to a bias signal, an oscillator, coupled to the current generator, for generating a clock signal according to the first current, a frequency detector, coupled to the oscillator, for generating a control signal according to the clock signal and a reference signal, and a bias voltage adjuster, coupled to the current generator and the frequency detector, for adjusting the bias signal according to the control signal. When the signal frequency of the clock signal changes, the bias signal corresponds to the bias voltage adjuster, to adjust the first current and the second current.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: March 19, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chiao-Ling Chang, Ying-Hsi Lin
  • Patent number: 8401511
    Abstract: A current-mode wireless receiver includes a pre-processor to receive a voltage-mode input signal and output a current-mode pre-processed signal corresponding to the voltage-mode input signal, a mixer to perform frequency down-conversion upon the current-mode pre-processed signal to generate a current-mode frequency down-converted signal, and an amplifier to amplify the current-mode frequency down-converted signal to generate a current-mode output signal. A method of wireless reception is also disclosed.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: March 19, 2013
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-Hsi Lin, Yi-Shao Chang
  • Publication number: 20120293084
    Abstract: An operating circuit applied to a backlight is provided, where the backlight includes a plurality of lighting elements, and the operating circuit includes a plurality of current control circuits, a plurality of switches, a minimum voltage selector, a supply voltage generating circuit and a control unit. The current control circuits are coupled to the lighting elements via a plurality of nodes, respectively. The switches are coupled to the nodes, respectively. The minimum voltage selector is utilized for receiving at least a portion of voltages of the plurality of nodes, and selecting a minimum voltage among the received voltages. The supply voltage generating circuit is utilized for generating a supply voltage of the lighting elements according to the minimum voltage. For each of the switches, the control unit determines an on/off state of the switch by determining whether the corresponding lighting element is an open circuit or not.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 22, 2012
    Inventors: Shu-Min Lin, Jyi-Si Lo, Ying-Hsi Lin
  • Publication number: 20120293081
    Abstract: An operating circuit applied to a backlight includes at least one current control circuit, where the current control circuit includes a transistor, an operational amplifier and a switch module. The transistor has a gate, a first electrode and a second electrode, where the first electrode is coupled to a lighting element, and the second electrode is coupled to a resistor. The operational amplifier has positive and negative input terminals, and positive and negative output terminals. The switch module switches a connection relationship between the positive input terminal, the negative input terminal, the reference voltage and the second electrode of the transistor, and switches a connection relationship between the positive output terminal, the negative output terminal and the gate of the transistor to make the close loop form a negative feedback, and the current of the lighting element not influenced by an offset voltage of the operational amplifier.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 22, 2012
    Inventors: Shu-Min Lin, Jyi-Si Lo, Ying-Hsi Lin
  • Patent number: 8280339
    Abstract: A mixer capable of detecting or controlling a common mode voltage thereof, includes at least: a mixing module for mixing a first set of differential signals and a second set of differential signals to generate at least one mixed signal; and a compensation module for compensating at least one operation point of the mixing module.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: October 2, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventor: Ying-Hsi Lin
  • Patent number: 8280327
    Abstract: An adjusting method for reducing local oscillation leakage or I/Q mismatch in a receiver includes the steps of: (a) detecting a current extent of local oscillation leakage or I/Q mismatch; (b) determining if an adjusting direction is correct with reference to the current extent of local oscillation leakage or I/Q mismatch thus detected, maintaining the adjusting direction if correct, and reversing the adjusting direction upon determining that the adjusting direction is incorrect; and (c) adjusting a control signal according to the adjusting direction.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: October 2, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Hong-Ta Hsu, Ying-Hsi Lin
  • Publication number: 20120223685
    Abstract: The invention discloses a voltage regulating apparatus, which includes: a linear regulator generating a first error signal; a switching regulator generating a first and a second PWM signals; a selecting unit coupled to the linear and switching regulators, receiving the first error signal and the second PWM signal, and outputting a regulating signal; a first power transistor coupled to the switching regulator and receiving the first PWM signal; and a second power transistor coupled to the selecting unit and receiving the regulating signal; wherein the voltage regulating apparatus can be put either in a linear mode of operation if the first error signal is selected as the regulating signal, or in a switching mode of operation if the second PWM signal is selected as the regulating signal.
    Type: Application
    Filed: November 10, 2011
    Publication date: September 6, 2012
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Tsung-Yen Tsai, Ying Hsi Lin
  • Patent number: 8253401
    Abstract: A voltage conversion apparatus includes a DC-to-DC conversion circuit, a sensing circuit, and a compensation circuit. The voltage conversion apparatus is capable of adaptively adjusting the system bandwidth according to the load. The system bandwidth is increased to make the converted voltage responding to the load rapidly when the voltage conversion apparatus is operated at a transient state; and the system bandwidth is decreased to increase the system stability when the voltage conversion circuit is operated at a steady state.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: August 28, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ke-Horng Chen, Yu-Huei Lee, Shih-Jung Wang, Chun-Yu Hsieh, Ying-Hsi Lin
  • Publication number: 20120169307
    Abstract: The present invention relates to a Single Inductor Double Output (SIDO) power converter, which comprises a power-stage circuit, a current detector, a slope compensation device, at least two error amplifiers, a comparing unit, a mode exchange circuit, a logical device and a driver. The SIDO current converter achieves an optimal SIDO power converting efficiency by controlling a full-current mode. Furthermore, different power transferring modes, under a variety of loadings, are used to address the issue of cross regulation and at meanwhile solving output voltage ripples and transient response to ensure the SIDO power converter a more flexible usage environment and better output performance.
    Type: Application
    Filed: November 25, 2011
    Publication date: July 5, 2012
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ke-Horng Chen, Yu-Huei Lee, Shih-Jung Wang, Yao-Yi Yang, Ying Hsi Lin
  • Patent number: 8159201
    Abstract: The present invention discloses a linear regulator and a voltage regulation method. The method comprises: providing a power transistor for converting a supply voltage to an output voltage to a load according to the conduction condition of the power transistor; controlling the conduction condition of the power transistor according to a comparison between a feedback signal relating to the output voltage and a reference voltage; obtaining a signal relating to a load condition; and controlling the conduction capability of the power transistor according to the signal relating to the load condition.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: April 17, 2012
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-Hsi Lin, Tsung-Yen Tsai
  • Publication number: 20110261911
    Abstract: An adjusting method for reducing local oscillation leakage or I/Q mismatch in a receiver includes the steps of: (a) detecting a current extent of local oscillation leakage or I/Q mismatch; (b) determining if an adjusting direction is correct with reference to the current extent of local oscillation leakage or I/Q mismatch thus detected, maintaining the adjusting direction if correct, and reversing the adjusting direction upon determining that the adjusting direction is incorrect; and (c) adjusting a control signal according to the adjusting direction.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 27, 2011
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hong-Ta Hsu, Ying-Hsi Lin
  • Publication number: 20110115570
    Abstract: This invention discloses a clock generator capable of automatically adjusting output clock when process, voltage, or temperature variation occurred. The clock generator comprises: a current generator, for generating a first current and a second current according to a bias signal; an oscillator, coupled to the current generator, for generating a clock signal according to the first current; a frequency detector, coupled to the oscillator, for generating a control signal according to the clock signal and a reference signal; and a bias voltage adjuster, coupled to the current generator and the frequency detector, for adjusting the bias signal according to the control signal; wherein, when the signal frequency of the clock signal changes, the bias signal corresponds to the bias voltage adjuster, to adjust the first current and the second current.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 19, 2011
    Inventors: Chiao-Ling CHANG, Ying-Hsi Lin
  • Publication number: 20110111717
    Abstract: A current-mode wireless receiver includes a pre-processor to receive a voltage-mode input signal and output a current-mode pre-processed signal corresponding to the voltage-mode input signal, a mixer to perform frequency down-conversion upon the current-mode pre-processed signal to generate a current-mode frequency down-converted signal, and an amplifier to amplify the current-mode frequency down-converted signal to generate a current-mode output signal. A method of wireless reception is also disclosed.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 12, 2011
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ying-Hsi LIN, Yi-Shao CHANG
  • Patent number: 7738852
    Abstract: Disclosed is a mixer comprising: a switching circuit, having a first pair of differential signal nodes and a second pair of differential signal nodes, for switching according to a local oscillation signal; an amplifying stage circuit, for receiving an input signal and amplifying the input signal; a load circuit, for serving as the loading of the mixer and generating an output signal of the mixer; a common-mode feedback circuit, for receiving the output signal and generating a feedback signal according to the output signal; a first current source, for receiving the feedback signal and generating a first current according to the feedback signal; and a second current source, for receiving the feedback signal and generating a second current according to the feedback signal.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: June 15, 2010
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-Yao Lin, Ying-Hsi Lin
  • Publication number: 20100066327
    Abstract: A voltage conversion apparatus includes a DC-to-DC conversion circuit, a sensing circuit, and a compensation circuit. The voltage conversion apparatus is capable of adaptively adjusting the system bandwidth according to the load. The system bandwidth is increased to make the converted voltage responding to the load rapidly when the voltage conversion apparatus is operated at a transient state; and the system bandwidth is decreased to increase the system stability when the voltage conversion circuit is operated at a steady state.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 18, 2010
    Inventors: Ke-Horng Chen, Yu-Huei Lee, Shih-Jung Wang, Chun-Yu Hsieh, Ying-Hsi Lin
  • Patent number: 7636405
    Abstract: A method and device for calibrating in-phase and quadrature-phase (IQ) mismatch. The device is used in a direct down-conversion circuit of a communication system. The device has a first mixer for mixing an RF signal with a first carrier signal, so as to generate an in-phase analog signal; a second mixer for mixing the RF signal with a second carrier signal, so as to generate a quadrature-phase analog signal; an operation unit for executing a Least Mean Square (LMS) algorithm and thereby generating a compensation signal according to the in-phase analog signal and the quadrature-phase analog signal; and a calibration unit for compensating the in-phase analog signal and the quadrature-phase analog signal according to the compensation signal, so as to calibrate the IQ mismatch between the in-phase analog signal and the quadrature-phase analog signal.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: December 22, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chao-Cheng Lee, Ying-Yao Lin, Ying-Hsi Lin
  • Patent number: 7583166
    Abstract: The present invention provides an apparatus for enhancing Q factor of an inductor. The apparatus includes a negative resistance generator coupled to the inductor for providing a negative resistance, and a bias circuit coupled to the negative resistance generator for biasing the negative resistance generator.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: September 1, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-Yao Lin, Ying-Hsi Lin