Abstract: A blood smear preparation device includes a base; a carrying table for carrying a microscope slide thereon and being supported on the base; a lifting mechanism mounted to the base; a retaining stand suspended from an output end of the lifting mechanism; a spreader holder rotatably suspended from the retaining stand about a second rotating shaft and positioned above the carrying table; a positioning member for positioning the spreader; and a torsion elastic member provided about the second rotating shaft, with a free end of the torsion elastic member abutting against the spreader holder. With the provision of the second rotating shaft and the torsion elastic member, the spreader has a certain degree of flexibility and self-adaptiveness. Even if the spreader or the microscope slide has no good micro-flatness or straightness, the device may automatically adjust the positions of the spreader and the microscope slide to achieve a line contact and a surface contact, and thus ensure the quality of the blood smear.

Abstract: Semiconductor devices with dual-metal gate structures and fabrication methods thereof. A semiconductor substrate with a first doped region and a second doped region separated by an insulation layer is provided. A first metal gate stack is formed on the first doped region, and a second metal gate stack is formed on the second doped region. A sealing layer is disposed on sidewalls of the first gate stack and the second gate stack. The first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer. The second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.

Abstract: Semiconductor devices with dual-metal gate structures and fabrication methods thereof. A semiconductor substrate with a first doped region and a second doped region separated by an insulation layer is provided. A first metal gate stack is formed on the first doped region, and a second metal gate stack is formed on the second doped region. A sealing layer is disposed on sidewalls of the first gate stack and the second gate stack. The first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer. The second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.

Abstract: Semiconductor devices with dual-metal gate structures and fabrication methods thereof. A semiconductor substrate with a first doped region and a second doped region separated by an insulation layer is provided. A first metal gate stack is formed on the first doped region, and a second metal gate stack is formed on the second doped region. A sealing layer is disposed on sidewalls of the first gate stack and the second gate stack. The first metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a first metal layer on the high-k dielectric layer, a metal insertion layer on the first metal layer, a second metal layer on the metal insertion layer, and a polysilicon layer on the second metal layer. The second metal gate stack comprises an interfacial layer, a high-k dielectric layer on the interfacial layer, a second metal layer on the high-k dielectric layer, and a polysilicon layer on the second metal layer.

Abstract: A CMOS device has PMOS and NMOS transistors with different gate structures overlying a semiconductor device. A first gate structure overlying the PMOS device region has a first gate dielectric layer overlying the semiconductor substrate, and a first gate conductor overlying the first gate dielectric layer. A second gate device region overlying the NMOS device region has a second gate dielectric layer overlying the semiconductor substrate, and a second gate conductor overlying the first gate dielectric layer. The first gate conductor has a silicon-based material layer, and the second gate conductor has a metal-based material layer.

Abstract: A blood smear preparation device includes a base; a carrying table for carrying a microscope slide thereon and being supported on the base; a lifting mechanism mounted to the base; a retaining stand suspended from an output end of the lifting mechanism; a spreader holder rotatably suspended from the retaining stand about a second rotating shaft and positioned above the carrying table; a positioning member for positioning the spreader; and a torsion elastic member provided about the second rotating shaft, with a free end of the torsion elastic member abutting against the spreader holder. With the provision of the second rotating shaft and the torsion elastic member, the spreader has a certain degree of flexibility and self-adaptiveness. Even if the spreader or the microscope slide has no good micro-flatness or straightness, the device may automatically adjust the positions of the spreader and the microscope slide to achieve a line contact and a surface contact, and thus ensure the quality of the blood smear.

Abstract: A new method is provided for the creation of an oxide layer that contains three different thicknesses. A first layer of oxide is grown on the surface of a substrate; a first layer of photoresist is deposited and patterned thereby partially exposing the surface of the underlying first layer of oxide. A nitrogen implant is performed into the surface of the underlying substrate; the photoresist mask of the first layer of photoresist is removed. A second layer of photoresist is deposited and patterned, the first layer of oxide is removed from above and surrounding the implanted regions of the substrate. The second mask of resist is removed.