Patents by Inventor Ying Lai

Ying Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250103106
    Abstract: A display apparatus including a foldable touch display panel and a display driving device is provided. The foldable touch display panel includes a plurality of touch sensors. The display driving device is coupled to the foldable touch display panel. The display driving device is configured to determine a folding angle of the foldable touch display panel according to a capacitance variation of the touch sensors in a folded state, and drive the foldable touch display panel to operate in a full panel display mode or in a partial panel display mode according to the folding angle.
    Type: Application
    Filed: May 23, 2024
    Publication date: March 27, 2025
    Applicant: Novatek Microelectronics Corp.
    Inventors: Kun-Zheng Lin, Yi-Ying Lin, Chih-Chang Lai
  • Patent number: 12255565
    Abstract: A method and system for online monitoring and compensation of inter-turn short circuit faults (ISF) in windings of electric machines, such as permanent magnet synchronous motors is provided. A method for characterizing an ISF in a winding of an electric machine comprises: measuring phase voltages and currents; calculating sequence components of the electric machine based on the phase voltages and currents; determining a ratio between a percentage of shorted turns in the winding and a fault loop resistance based on the sequence components of the electric machine; and estimating characteristics of the inter-turn short circuit fault using an unscented Kalman filter. The characteristics include at least one of: a fault current, the percentage of shorted turns, or the fault loop resistance. A method for compensation an ISF in a winding of an electric machine comprises compensating the fault current based on the compensation current estimated from an unscented Kalman filter.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: March 18, 2025
    Assignee: MAGNA POWERTRAIN GMBH & CO KG
    Inventors: Ying Zuo, Chunyan Lai, Lakshmi Varaha Iyer
  • Publication number: 20250085476
    Abstract: A photonic device includes a silicon layer, wherein the silicon layer includes a waveguide portion. The photonic device further includes a cladding layer over the waveguide portion, wherein the cladding layer partially exposes a surface of the waveguide portion. The photonic device further includes a low refractive index layer in direct contact with the cladding layer, wherein the low refractive index layer comprises silicon oxide, silicon carbide, silicon oxynitride, silicon carbon oxynitride, aluminum oxide or hafnium oxide. The photonic device further includes an interconnect structure over the low refractive index layer.
    Type: Application
    Filed: November 21, 2024
    Publication date: March 13, 2025
    Inventors: Chien-Ying WU, Yuehying LEE, Sui-Ying HSU, Chen-Hao HUANG, Chien-Chang LEE, Chia-Ping LAI
  • Patent number: 12245817
    Abstract: The invention provides devices and methods for non-invasive monitoring and measuring of intraocular pressure (IOP) of a subject. Embodiments include a lens that is adapted to fit on the subject's eye, a microstructure disposed in or on the lens, the microstructure having at least one feature that exhibits a change in shape and/or geometry and/or position on the lens in response to a change in curvature of the lens. When the curvature of the lens changes in response to a change in IOP, a corresponding change in shape and/or geometry and/or position of the feature may be used to determine the change in IOP. The change in the feature is detectable in digital images of the lens taken with a mobile electronic device such as a smartphone.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: March 11, 2025
    Assignees: Queen's University at Kingston, Kingston Health Sciences Centre
    Inventors: Yong Jun Lai, Kong Ying Xie, Robert James Campbell
  • Publication number: 20250079538
    Abstract: An electronic device and a battery management method thereof are provided. The method includes the following. A battery learning enable command is received to execute a battery learning operation. During an execution period of the battery learning operation, usage record data of a battery module is analyzed to obtain usage situation information. An appropriate value of a charging limit capacity is determined based on the usage situation information.
    Type: Application
    Filed: May 24, 2024
    Publication date: March 6, 2025
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chunyen Lai, Chun Tsao, Wen-Che Chung, Ying-Yui Wu
  • Patent number: 12231844
    Abstract: A microphone system of the invention is applicable to an electronic device comprising an adjustable mechanism that causes a change in geometry of a microphone array. The microphone system comprises the microphone array, a sensor and a beamformer. The microphone array comprises multiple microphones that detect sound and generate multiple audio signals. The sensor detects a mechanism variation of the electronic device to generate a sensing output. The beamformer is configured to perform a set of operations comprising: performing a spatial filtering operation over the multiple audio signals using a trained model based on the sensing output, one or more first sound sources in one or more desired directions and one or more second sound sources in one or more undesired directions to generate a beamformed output signal originated from the one or more first sound sources.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: February 18, 2025
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Hua-Jun Hong, Chih-Sheng Chen, Hsueh-Ying Lai, Yu-Pao Tsai, Tsung-Liang Chen
  • Patent number: 12224108
    Abstract: A coil module is provided, including a second coil mechanism. The second coil mechanism includes a third coil assembly and a second base corresponding to the third coil assembly. The second base has a positioning assembly corresponding to a first coil mechanism.
    Type: Grant
    Filed: October 5, 2023
    Date of Patent: February 11, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Feng-Lung Chien, Tsang-Feng Wu, Yuan Han, Tzu-Chieh Kao, Chien-Hung Lin, Kuang-Lun Lee, Hsiang-Hui Hsu, Shu-Yi Tsui, Kuo-Jui Lee, Kun-Ying Lee, Mao-Chun Chen, Tai-Hsien Yu, Wei-Yu Chen, Yi-Ju Li, Kuei-Yuan Chang, Wei-Chun Li, Ni-Ni Lai, Sheng-Hao Luo, Heng-Sheng Peng, Yueh-Hui Kuan, Hsiu-Chen Lin, Yan-Bing Zhou, Chris T. Burket
  • Publication number: 20250048760
    Abstract: An electronic device includes an encapsulant, an optical emitter, and an optical sensor. The optical sensor is encapsulated by the encapsulant. The optical emitter is supported by the encapsulant.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 6, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsin-Ying HO, Lu-Ming LAI, Shih-Chieh TANG
  • Patent number: 12218440
    Abstract: An antenna structure includes a ground element, a feeding radiation element, a first radiation element, a second radiation element, a first coupling branch, and a dielectric substrate. The feeding radiation element has a feeding point. The first radiation element is coupled to the feeding radiation element. The second radiation element is coupled to the feeding radiation element. The second radiation element and the first radiation element substantially extend in opposite directions. The first coupling branch is coupled to a first grounding point on the ground element. The first coupling branch extends across the first radiation element. The first coupling branch includes a first coil portion and a first connection portion.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: February 4, 2025
    Assignee: WISTRON NEWEB CORP.
    Inventors: Tzu-Min Wu, Kuo-Jen Lai, Kuang-Yuan Ku, Hung-Ying Lin, Wen-Tai Tseng
  • Patent number: 12219329
    Abstract: A microphone system for a boomless headset is disclosed, comprising a microphone array and a processing unit. The microphone array comprises Q microphones and generates Q audio signals. A first microphone and a second microphone are disposed on different earcups, and a third microphone is disposed on one of two earcups and displaced laterally and vertically from one of the first and the second microphones. The processing unit performs operations comprising: performing spatial filtering over the Q audio signals using a trained model based on an arc line with a vertical distance and a horizontal distance from a midpoint between the first and the second microphones, a time delay range for the first and the second microphones and coordinates of the Q microphones to generate a beamformed output signal originated from zero or more target sound sources inside a target beam area, where Q>=3.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: February 4, 2025
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Hsueh-Ying Lai, Chih-Sheng Chen, Hua-Jun Hong, Chien Hua Hsu, Tsung-Liang Chen
  • Publication number: 20250029161
    Abstract: A method for customizing an appearance of a merchandise which is suitable for being performed by a computing device in order to customize a customized choice result selected by a user includes a designed image and a merchandise information. The method includes receiving the designed image, receiving the merchandise information, overlappingly displaying the designed image on a virtual merchandise image corresponding to the merchandise information, receiving at least one edit operation for at least one designed element in the designed image, and editing for the designed element in the designed image according to the edit operation and then generating a customizing virtual image. Thereby, the method can be used for customizing an appearance of a merchandise and directly customize the designed image that has been arranged. In addition, a computing device and a non-transitory computer-readable recording medium for customizing the appearance of the merchandise are also provided.
    Type: Application
    Filed: June 3, 2024
    Publication date: January 23, 2025
    Applicant: EVOLUTIVE LABS CO., LTD.
    Inventors: TZI-HUEI LAI, YA-HSUAN CHANG, XIN-YING YOU, WEN-YAO TSAI, JUN-QI WANG, CHI-EN WU, YU-TING LIANG, YEONG-JYI LEI
  • Publication number: 20240427389
    Abstract: Examples herein relate to ambient noise level detection. For instance, in some examples an electronic device includes a cooling resource and a processor resource to alter an operational speed of the cooling resource from an initial operational speed to a first altered operational speed, detect an ambient noise level, compare the ambient noise level to a first noise threshold, and restrict the operational speed of the cooling resource to be less than the initial operational speed.
    Type: Application
    Filed: September 15, 2021
    Publication date: December 26, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: CHIH-WEI HUANG, YI-YING LAI, CHIH-LING WEI, HUNG HUA PENG, DAVIS MATTHEW CASTILLO, CHING YU
  • Publication number: 20240413692
    Abstract: A motor includes a rotor and a stator. The stator includes a stator core, and at least one coil module that is wound on the stator core. Each of the at least one coil module includes a plurality of first winding sets that are wound on the stator core. Each of the first winding sets includes a first end and a second end. For each of the at least one coil module, the first ends respectively of the first winding sets are electrically connected to each other, and the second ends respectively of the first winding sets are electrically connected to each other, such that the first winding sets are connected in parallel.
    Type: Application
    Filed: April 8, 2024
    Publication date: December 12, 2024
    Inventors: MAO-YING LAI, JIA-HAO LAI
  • Patent number: 12147163
    Abstract: A method for correcting critical dimension (CD) measurements of a lithographic tool includes steps as follows. A correction pattern having a first sub-pattern parallel to a first direction and a second sub-pattern parallel to a second direction is provided on a lithographic mask; wherein the first sub-pattern and the second sub-pattern come cross with each other. A first After-Develop-Inspection critical dimension (ADI CD) of a developed pattern formed on a photo-sensitive layer and transferred from the correction pattern is measured using the lithographic tool along a first scanning direction. A second ADI CD of the developed pattern is measured using the lithographic tool along a second scanning direction. The first ADI CD is subtracted from the second ADI CD to obtain a measurement bias value. Exposure conditions and/or measuring parameters of the lithographic tool are adjusted according to the measurement bias value.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: November 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hsin-Yu Hsieh, Kuan-Ying LAi, Chang-Mao Wang, Chien-Hao Chen, Chun-Chi Yu
  • Publication number: 20240379449
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first n-type transistor having a first threshold voltage and including a first gate dielectric layer, and a second n-type transistor having a second threshold voltage and including a second gate dielectric layer. The first threshold voltage is lower than the second threshold. Each of the first gate dielectric layer and the second gate dielectric layer contains fluorine and hafnium. The first gate dielectric layer has a first average fluorine concentration and a first average hafnium concentration. The second gate dielectric layer has a second average fluorine concentration and a second average hafnium concentration. A first ratio of the first average fluorine concentration to the first average hafnium concentration is greater than and a second ratio of the second average fluorine concentration to the second average hafnium concentration.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei Ying LAI, Chia-Wei HSU, Tsung-Da LIN, Chi On CHUI
  • Publication number: 20240379842
    Abstract: The present disclosure provides a semiconductor device, including a substrate, a first dopant region in the substrate, wherein the first dopant is doped with a first conductivity type dopant, a first drift region at a top surface of the substrate, a first drain region adjacent to the first drift region, a second drain region, wherein an upper portion of the first dopant region is between the first drain region and the second drain region, and a first conductive layer connecting the first drain region, the second drain region, and a top surface of the upper portion of the first dopant region, wherein a Schottky barrier interface is formed between the top surface of the upper portion of the first dopant region and the first conductive layer.
    Type: Application
    Filed: May 9, 2023
    Publication date: November 14, 2024
    Inventors: YU-YING LAI, PO-CHIH SU, RUEY-HSIN LIU
  • Publication number: 20240379516
    Abstract: Methods of manufacture for a hybrid interposer within a semiconductor device. A method of forming a semiconductor structure may include forming a package substrate and forming a hybrid interposer. Forming a hybrid interposer may include depositing a non-organic interposed material layer over the package substrate and depositing an organic interposer material layer over the non-organic interposer material layer.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Monsen LIU, Shuo-Mao CHEN, Po-Ying LAI, Shang-Lun TSAI, Shin-Puu JENG
  • Patent number: 12143782
    Abstract: A microphone system is disclosed, comprising: a microphone array and a processing unit. The microphone array comprises Q microphones that detect sound and generate Q audio signals. The processing unit is configured to perform operations comprising: spatial filtering over the Q audio signals using a trained model based on at least one target beam area (TBA) and coordinates of the Q microphones to generate a beamformed output signal originated from ? target sound source inside the at least one TBA, where ?>=0. Each TBA is defined by r time delay ranges for r combinations of two microphones out of the Q microphones, where Q>=3 and r>=1. A dimension of a first number for locations of all sound sources able to be distinguished by the processing unit increases as a dimension of a second number for a geometry formed by the Q microphones increases.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: November 12, 2024
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Hsueh-Ying Lai, Chih-Sheng Chen, Chien-Hua Hsu, Hua-Jun Hong, Tsung-Liang Chen
  • Publication number: 20240347606
    Abstract: Dipole engineering techniques are disclosed that incorporate dipole dopant and/or nitrogen into gate dielectrics (e.g., high-k dielectric layers thereof) to realize multi-threshold voltage transistor tuning of transistors. The dipole engineering techniques include (1) forming a dipole dopant source layer over gate dielectrics of some transistors, but not other transistors, (2) forming a mask over gate dielectrics of some transistors, but not other transistors, (3) performing a nitrogen-containing thermal drive-in process, and (4) removing the dipole dopant source layer and the mask after the nitrogen-containing thermal drive-in process. The nitrogen-containing thermal drive-in process diffuses nitrogen and dipole dopant (n-dipole dopant and/or p-dipole dopant) into unmasked gate dielectrics having the dipole dopant source layer formed thereon, nitrogen into unmasked gate dielectrics, and dipole dopant into masked gate dielectrics having the dipole dopant source layer formed thereon.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 17, 2024
    Inventors: Pei Ying LAI, Cheng-Chieh LIN, Hsueh-Ju CHEN, Tsung-Da LIN, Cheng-Hao HOU, Chi On CHUI
  • Publication number: 20240339446
    Abstract: Damage to an LDMOS transistor from voltage overshoot in a power switching circuit operating at high switching speeds is prevented by embedding a diode under a drain region of the LDMOS transistor. The embedded diode is doped more heavily than a drift region of the LDMOS transistor and lowers a breakdown voltage of the LDMOS transistor.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 10, 2024
    Inventors: Yu-Ying Lai, Po-Chih Su, Ruey-Hsin Liu