Abstract: A method forming a source/drain region based on a first portion of a semiconductor region, forming a high-k dielectric layer based on a second portion of the semiconductor region, forming a dipole film on the high-k dielectric layer, performing a treatment process on the dipole film using a process gas comprising nitrogen and hydrogen, performing a drive-in process to drive a dipole dopant in the dipole film into the high-k dielectric layer, and depositing a work-function layer on the high-k dielectric layer.

Abstract: Devices and methods of manufacture for a hybrid interposer within a semiconductor device. A semiconductor device may include a package substrate and a hybrid interposer. The hybrid interposer may include an organic interposer material layer, and a non-organic interposer material layer positioned between the organic interposer material layer and the package substrate. The semiconductor device may further include an integrated device positioned within the hybrid interposer. In one embodiment, the integrated device may be positioned within the organic interposer material layer. In another embodiment, the integrated device may be positioned within the non-organic interposer material layer. In a further embodiment, the integrated device may be positioned within the organic interposer material layer and the non-organic interposer material layer.

Abstract: A microphone system of the invention is applicable to an electronic device comprising an adjustable mechanism that causes a change in geometry of a microphone array. The microphone system comprises the microphone array, a sensor and a beamformer. The microphone array comprises multiple microphones that detect sound and generate multiple audio signals. The sensor detects a mechanism variation of the electronic device to generate a sensing output. The beamformer is configured to perform a set of operations comprising: performing a spatial filtering operation over the multiple audio signals using a trained model based on the sensing output, one or more first sound sources in one or more desired directions and one or more second sound sources in one or more undesired directions to generate a beamformed output signal originated from the one or more first sound sources.

Abstract: A microphone system for a boomless headset is disclosed, comprising a microphone array and a processing unit. The microphone array comprises Q microphones and generates Q audio signals. A first microphone and a second microphone are disposed on different earcups, and a third microphone is disposed on one of two earcups and displaced laterally and vertically from one of the first and the second microphones. The processing unit performs operations comprising: performing spatial filtering over the Q audio signals using a trained model based on an arc line with a vertical distance and a horizontal distance from a midpoint between the first and the second microphones, a time delay range for the first and the second microphones and coordinates of the Q microphones to generate a beamformed output signal originated from zero or more target sound sources inside a target beam area, where Q>=3.

Abstract: Examples herein relate to ambient noise level detection. For instance, in some examples an electronic device includes a cooling resource and a processor resource to alter an operational speed of the cooling resource from an initial operational speed to a first altered operational speed, detect an ambient noise level, compare the ambient noise level to a first noise threshold, and restrict the operational speed of the cooling resource to be less than the initial operational speed.

Abstract: A motor includes a rotor and a stator. The stator includes a stator core, and at least one coil module that is wound on the stator core. Each of the at least one coil module includes a plurality of first winding sets that are wound on the stator core. Each of the first winding sets includes a first end and a second end. For each of the at least one coil module, the first ends respectively of the first winding sets are electrically connected to each other, and the second ends respectively of the first winding sets are electrically connected to each other, such that the first winding sets are connected in parallel.

Abstract: A method for correcting critical dimension (CD) measurements of a lithographic tool includes steps as follows. A correction pattern having a first sub-pattern parallel to a first direction and a second sub-pattern parallel to a second direction is provided on a lithographic mask; wherein the first sub-pattern and the second sub-pattern come cross with each other. A first After-Develop-Inspection critical dimension (ADI CD) of a developed pattern formed on a photo-sensitive layer and transferred from the correction pattern is measured using the lithographic tool along a first scanning direction. A second ADI CD of the developed pattern is measured using the lithographic tool along a second scanning direction. The first ADI CD is subtracted from the second ADI CD to obtain a measurement bias value. Exposure conditions and/or measuring parameters of the lithographic tool are adjusted according to the measurement bias value.

Abstract: Methods of manufacture for a hybrid interposer within a semiconductor device. A method of forming a semiconductor structure may include forming a package substrate and forming a hybrid interposer. Forming a hybrid interposer may include depositing a non-organic interposed material layer over the package substrate and depositing an organic interposer material layer over the non-organic interposer material layer.

Abstract: The present disclosure provides a semiconductor device, including a substrate, a first dopant region in the substrate, wherein the first dopant is doped with a first conductivity type dopant, a first drift region at a top surface of the substrate, a first drain region adjacent to the first drift region, a second drain region, wherein an upper portion of the first dopant region is between the first drain region and the second drain region, and a first conductive layer connecting the first drain region, the second drain region, and a top surface of the upper portion of the first dopant region, wherein a Schottky barrier interface is formed between the top surface of the upper portion of the first dopant region and the first conductive layer.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first n-type transistor having a first threshold voltage and including a first gate dielectric layer, and a second n-type transistor having a second threshold voltage and including a second gate dielectric layer. The first threshold voltage is lower than the second threshold. Each of the first gate dielectric layer and the second gate dielectric layer contains fluorine and hafnium. The first gate dielectric layer has a first average fluorine concentration and a first average hafnium concentration. The second gate dielectric layer has a second average fluorine concentration and a second average hafnium concentration. A first ratio of the first average fluorine concentration to the first average hafnium concentration is greater than and a second ratio of the second average fluorine concentration to the second average hafnium concentration.

Abstract: A microphone system is disclosed, comprising: a microphone array and a processing unit. The microphone array comprises Q microphones that detect sound and generate Q audio signals. The processing unit is configured to perform operations comprising: spatial filtering over the Q audio signals using a trained model based on at least one target beam area (TBA) and coordinates of the Q microphones to generate a beamformed output signal originated from ? target sound source inside the at least one TBA, where ?>=0. Each TBA is defined by r time delay ranges for r combinations of two microphones out of the Q microphones, where Q>=3 and r>=1. A dimension of a first number for locations of all sound sources able to be distinguished by the processing unit increases as a dimension of a second number for a geometry formed by the Q microphones increases.

Abstract: Dipole engineering techniques are disclosed that incorporate dipole dopant and/or nitrogen into gate dielectrics (e.g., high-k dielectric layers thereof) to realize multi-threshold voltage transistor tuning of transistors. The dipole engineering techniques include (1) forming a dipole dopant source layer over gate dielectrics of some transistors, but not other transistors, (2) forming a mask over gate dielectrics of some transistors, but not other transistors, (3) performing a nitrogen-containing thermal drive-in process, and (4) removing the dipole dopant source layer and the mask after the nitrogen-containing thermal drive-in process. The nitrogen-containing thermal drive-in process diffuses nitrogen and dipole dopant (n-dipole dopant and/or p-dipole dopant) into unmasked gate dielectrics having the dipole dopant source layer formed thereon, nitrogen into unmasked gate dielectrics, and dipole dopant into masked gate dielectrics having the dipole dopant source layer formed thereon.

Abstract: Damage to an LDMOS transistor from voltage overshoot in a power switching circuit operating at high switching speeds is prevented by embedding a diode under a drain region of the LDMOS transistor. The embedded diode is doped more heavily than a drift region of the LDMOS transistor and lowers a breakdown voltage of the LDMOS transistor.

Abstract: A method includes forming a gate dielectric on a semiconductor region, depositing an aluminum nitride layer on the gate dielectric, depositing an aluminum oxide layer on the aluminum nitride layer, performing an annealing process to drive aluminum in the aluminum nitride layer into the gate dielectric, removing the aluminum oxide layer and the aluminum nitride layer, and forming a gate electrode on the gate dielectric.

Abstract: A first n-type transistor includes a first channel component, an undoped first gate dielectric layer disposed over the first channel component, and a first gate electrode disposed over the undoped first gate dielectric layer. A second n-type transistor includes a second channel component and a doped second gate dielectric layer disposed over the second channel component. The second gate dielectric layer is doped with a p-type dipole material. A second gate electrode is disposed over the second gate dielectric layer. At least one of the first n-type transistor or the second n-type transistor further includes an aluminum-free conductive layer. The aluminum-free conductive layer is disposed between the first gate dielectric layer and the first gate electrode or between the second gate dielectric layer and the second gate electrode.

Abstract: A gate dielectric structure is formed over a channel structure. One or more work function (WF) metal layers of a metal gate are formed over the gate dielectric structure. The one or more WF metal layers are treated with a fluorine-containing material. One or more processes are performed to cause fluorine from the fluorine-containing material to diffuse at least partially into the gate dielectric structure.

Abstract: Dipole engineering techniques are disclosed that incorporate dipole dopant and/or nitrogen into gate dielectrics (e.g., high-k dielectric layers thereof) to realize multi-threshold voltage transistor tuning of transistors. The dipole engineering techniques include (1) forming a dipole dopant source layer over gate dielectrics of some transistors, but not other transistors, (2) forming a mask over gate dielectrics of some transistors, but not other transistors, (3) performing a nitrogen-containing thermal drive-in process, and (4) removing the dipole dopant source layer and the mask after the nitrogen-containing thermal drive-in process. The nitrogen-containing thermal drive-in process diffuses nitrogen and dipole dopant (n-dipole dopant and/or p-dipole dopant) into unmasked gate dielectrics having the dipole dopant source layer formed thereon, nitrogen into unmasked gate dielectrics, and dipole dopant into masked gate dielectrics having the dipole dopant source layer formed thereon.

Abstract: An example device comprises: a surface-type sensor to detect a type of surface on which the device is located; a proximity sensor; and a processor. The processor is to: in response to detecting, using the surface-type sensor, that the device is located on a soft-type surface, increase noise output of the device; and, in response to detecting, using the proximity sensor, that a plurality of persons are proximal the device, decrease the noise output of the device.

Abstract: Dipole engineering techniques are disclosed that incorporate dipole dopant and/or nitrogen into gate dielectrics (e.g., high-k dielectric layers thereof) to realize multi-threshold voltage transistor tuning of transistors. The dipole engineering techniques include (1) forming a dipole dopant source layer over gate dielectrics of some transistors, but not other transistors, (2) forming a mask over gate dielectrics of some transistors, but not other transistors, (3) performing a nitrogen-containing thermal drive-in process, and (4) removing the dipole dopant source layer and the mask after the nitrogen-containing thermal drive-in process. The nitrogen-containing thermal drive-in process diffuses nitrogen and dipole dopant (n-dipole dopant and/or p-dipole dopant) into unmasked gate dielectrics having the dipole dopant source layer formed thereon, nitrogen into unmasked gate dielectrics, and dipole dopant into masked gate dielectrics having the dipole dopant source layer formed thereon.

Abstract: A microphone system for a boomless headset is disclosed, comprising a microphone array and a processing unit. The microphone array comprises Q microphones and generates Q audio signals. A first microphone and a second microphone are disposed on different earcups, and a third microphone is disposed on one of two earcups and displaced laterally and vertically from one of the first and the second microphones. The processing unit performs operations comprising: performing spatial filtering over the Q audio signals using a trained model based on an arc line with a vertical distance and a horizontal distance from a midpoint between the first and the second microphones, a time delay range for the first and the second microphones and coordinates of the Q microphones to generate a beamformed output signal originated from zero or more target sound sources inside a target beam area, where Q>=3.