Patents by Inventor Ying Li

Ying Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11125642
    Abstract: A real-time monitoring and analysis method for a mechanical seal. In the method, an acoustic emission signal generated by a friction pair at a mechanical seal end surface is measured; a specific acoustic source generate signals on a plurality of specific frequency bands on an acoustic scale. In a seal operating process motion causes the acoustic emission signal to change on a dynamic time scale equivalent to a period of rotation. In a long-term seal service process, cumulative performance changes occur on a service time scale due to running-in, wear, and/or aging of elastic elements; for this feature, the long-term change process of the acoustic emission signal needs to be considered. Analysis is performed, on multiple scales, in combination with auxiliary information and with determined physical characterization quantities passed to scales of longer time, thereby determining the real-time working state of the seal and providing a performance change expectation of the seal.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: September 21, 2021
    Inventors: Weifeng Huang, Xiangfeng Liu, Yuan Yin, Ying Liu, Decai Li, Yongjian Li, Shuangfu Suo, Zixi Wang, Xiaohong Jia, Fei Guo
  • Patent number: 11123452
    Abstract: The present invention relates to an alkyl chitosan-graphene oxide composite sponge and preparation method and application thereof. The alkyl chitosan-graphene oxide composite sponge provided by the present invention includes alkyl chitosan and graphene oxide absorbed on the alkyl chitosan, and the adsorbing capacity of the graphene oxide is 3-28 wt. %. In the present invention, alkyl chitosan is used as a matrix to combine graphene oxide and alkyl chitosan; the obtained composite sponge has excellent hemostatic performance and blood absorption capacity. Results of embodiments indicate that the in-vitro whole blood coagulation time is less than 58 s, the hemostasis time of a rabbit femoral artery hemorrhage model is less than 155 s, the hemorrhage mass is less than 5.4 g, and the hemostatic effect is superior to a pure alkyl chitosan sponge or graphene oxide powder when the composite sponge provided by the present invention is used for hemostasis.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: September 21, 2021
    Assignee: Institute of Medical Support Technology, Academy of System Engineering, Academy of Military Science
    Inventors: Jing Guan, Jian Yang, Ying Zhang, Feng Tian, Jimin Wu, Sheng Ding, Zhihong Li, Chunlai Wang
  • Patent number: 11125932
    Abstract: A light guide plate and a manufacturing method thereof, a backlight module, and a display device are provided. The light guide plate includes a light incident surface, a light reflection surface, and a light-emitting surface; the light reflection surface includes a first prism structure array, the first prism structure array includes first prisms arranged in sequence in a first direction, and the first direction is perpendicular to the light incident surface; the first prism structure array is configured to enable light emitted from the light incident surface to be emitted toward the light-emitting surface; and the light-emitting surface includes a second cylindrical structure array, the second cylindrical structure array includes second cylindrical structures arranged side by side in a second direction, the second direction is perpendicular to the first direction, and a first plane including the first direction and the second direction is perpendicular to the light incident surface.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: September 21, 2021
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Honghao Yu, Hao Zhou, Lili Jia, Donglei Li, Hui Liu, Ying Chen, Shanshan Liu
  • Patent number: 11128494
    Abstract: Methods, computer program products, and systems are presented. The methods include, for instance: a gateway stack that includes a master, a backup, and at least one slave amongst nodes of the GS based on an election pursuant to a gateway stack protocol. The gateway stack provides gateway services for a Network Virtualization over Layer 3 (NVO3) network in a fail-safe manner by utilizing all of the nodes in the gateway stack. A data interface between the gateway stack and a switch is aggregated to evenly distribute inbound packets amongst the nodes of the gateway stack.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: September 21, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kai Hong Du, Xiao Jian Nie, Shashi Pratap Singh, Xiao Li Xu, Ying Lin Xu
  • Publication number: 20210282682
    Abstract: Systems and methods of use for continuous analyte measurement of a host's vascular system are provided. In some embodiments, a continuous glucose measurement system includes a vascular access device, a sensor and sensor electronics, the system being configured for insertion into communication with a host's circulatory system.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 16, 2021
    Inventors: Peter C. Simpson, Ying Li, Apurv Ullas Kamath, Richard C. Yang
  • Publication number: 20210285178
    Abstract: The present disclosure discloses a method for quantifying a bearing capacity of foundation containing shallow-hidden spherical cavities, comprising: in Step 1, constructing a spatial axisymmetric calculation model for stability analysis of the foundation containing shallow-hidden spherical cavities; in Step 2, solving the model to obtain a general solution which reflects the spatial stress distribution of surrounding rock containing shallow-hidden spherical cavities; in Step 3, obtain a mathematical expression by derivation for calculating the bearing capacity of the foundation containing shallow-hidden spherical cavities; and in Step 4: completing the determination of the foundation bearing capacity. Benefits: This method has many advantages such as comprehensive consideration, high accuracy and reliability of calculation results, and may provide the scientific basis for the development of prevention and control against the instability of the foundation containing shallow-hidden cavities.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 16, 2021
    Inventors: Peng XIE, Zurun YUE, Haijia WEN, Ying TENG, Shuqi YANG, Jiaqi LI, Lei YAN, Yuxuan YANG, Shaolong JIE, Bingyang LIU, Jingjing FU, Jing XIE, Zhichao DU, Di YIN
  • Publication number: 20210288896
    Abstract: This application discloses a method for processing a round trip delay, a related apparatus, and a readable storage medium, and pertains to the field of communications technologies. The method includes: receiving a delay quantization parameter of a common round trip delay RTD, where the delay quantization parameter includes a first quantization parameter, and the first quantization parameter is used to indicate a height-related delay; and obtaining the common RTD based on the delay quantization parameter. The height-related delay is indicated by using the first quantization parameter, so that the common RTD is obtained based on the first quantization parameter.
    Type: Application
    Filed: May 28, 2021
    Publication date: September 16, 2021
    Inventors: Ying CHEN, Hejia LUO, Chuili KONG, Rong LI
  • Patent number: 11119047
    Abstract: The present invention discloses an SERS substrate of a metal-modified semiconductor-based bionic compound eye bowl structure and a construction method, and belongs to the technical field of nano materials. The present invention is based on a multi-time interface self-assembly method. Firstly, a small ball template is constructed by using a gas-liquid interface assembly process. Then, a semiconductor bowl structure array is induced to be formed by the template by using a solid-liquid interface assembly process. Next, a semiconductor bowl is assembled to a surface of a pyramid-shaped cone to form a bionic compound eye structure by using a transfer process. Finally, a surface of the bionic compound eye structure is modified with a layer of uniformly distributed metal particles by a physical deposition method or a chemical deposition method, thereby forming the SERS substrate of the metal-modified semiconductor-based bionic compound eye bowl structure.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: September 14, 2021
    Assignee: JIANGNAN UNIVERSITY
    Inventors: Gang Shi, Ying Li, Jie Chen, Xuan Jin, Likui Wang, Dawei Wang, Jingguo Yang, Xinxin Sang, Caihua Ni
  • Patent number: 11119016
    Abstract: A digital image measurement device and method for the surface deformation of specimen based on sub-pixel corner detection is disclosed. This digital image measurement device is composed of a new type of image pressure cell, a complementary metal-oxide-semiconductor (CMOS) camera, a camera bracket, a flexible lens hood, a computer and matching measurement software. This method discretizes the specimen into several four-node finite elements by printing grids on the specimen and takes corners of the grids as the nodes of the finite elements; tracks the deformation of the feature points in real time by edge detection and corner detection based on sub-pixel; captures the deformation of the whole surface of the specimen by the two flat mirrors which are at an 120° angle behind the specimen; achieves the observation of the deformation of the whole surface by conducting splicing and error correction on the three images.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: September 14, 2021
    Assignees: Suzhou H-C Soil & Water Science and Technology Co., Ltd, Dalian University of Technology
    Inventors: Longtan Shao, Xiaoxia Guo, Yonglu Liu, Chuan Huang, Mingming Wu, Xicheng Li, Pingxin Xia, Peng Ju, Xiao Liu, Chun Wang, Jie Xue, Ying Wang
  • Patent number: 11119364
    Abstract: A liquid crystal phase shifter is provided, and includes a first substrate and a second substrate opposite to each other, and a liquid crystal layer between the first substrate and the second substrate. The first substrate includes a first base plate and a first electrode layer at a side of the first base plate proximal to the liquid crystal layer. The second substrate includes a second base plate and a second electrode layer at a side of the second base plate proximal to the liquid crystal layer. The first electrode layer includes a main body structure having a first side and a second side opposite to each other with respect to a length direction of the main body structure, and a plurality of branch structures connected to at least one of the first side and the second side of the main body structure.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: September 14, 2021
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Liang Li, Tienlun Ting, Jie Wu, Xue Cao, Ying Wang, Haocheng Jia, Cuiwei Tang, Peizhi Cai, Chuncheng Che
  • Patent number: 11119618
    Abstract: The present disclosure is related to a substrate. The substrate may include a plurality of electrode patterns. Each of the plurality of the electrode patterns may include a first electrode and a plurality of second electrodes connected to the first electrode. A shape of second electrodes of an electrode pattern may be complementary to a shape of second electrodes of at least one electrode pattern adjacent to the electrode pattern.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: September 14, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Ying Wang, Hongmin Li, Dong Wang, Zhifu Dong, Jian Tao, Li Sun
  • Publication number: 20210280511
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Application
    Filed: May 10, 2021
    Publication date: September 9, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20210274728
    Abstract: The present invention provides a nursery block, including a nutritive block for providing nutrients to seeds. The top of the nutritive block is provided with a seed placement pit. The seed placement pit is internally provided with a seed cultivation pit. The seed placement pit is of a structure with a big top and a small bottom so that the seeds fall into the seed cultivation pit along the surface of the seed placement pit under the action of gravity. The seed cultivation pit is internally provided with a notch which extends in a direction away from the seed cultivation pit and provides growth paths for root systems of the seeds. The present invention can improve the sowing efficiency, stabilize and moisten seeds and improve the overall germination rate and germination uniformity of the seeds, and is convenient for mechanized sowing.
    Type: Application
    Filed: July 16, 2019
    Publication date: September 9, 2021
    Inventors: Shaohua LI, Huaqin GONG, Ying CHEN
  • Patent number: 11112306
    Abstract: An optical signal analyzing apparatus enables real-time and single-shot analysis simultaneously in both time and frequency domains with spectro-temporal analysis. The apparatus includes a fiber tap coupler for receiving an input optical signal from continuous wave (CW) to ultra-short pulses (femtosecond-picosecond). An optical splitter directs part of the signal to a frequency channel and part to a time channel A photodiode in the time channel directly monitors the intensity evolution and converts it to an electrical signal. In the frequency channel, two sub-channels are provided: one for CW/quasi-CW and one for short-pulse components. A signal processor analyses the time- and frequency-domain data from the time channel and frequency channel and displays the temporal and spectral evolutions simultaneously, so that the two different pieces of information of a non-repeated dynamic event can be correlated in different domains.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: September 7, 2021
    Assignee: THE UNIVERSITY OF HONG KONG
    Inventors: Kin Yip Kenneth Wong, Xiaoming Wei, Bowen Li, Ying Yu, Chi Zhang
  • Patent number: 11110235
    Abstract: A medication dispenser includes a base seat, a circuitry unit and an outer casing. The base seat includes a mouthpiece. The circuitry unit includes a first circuit board, a battery, and first and second switches disposed on the first circuit board. The outer casing is movable relative to the base seat between a close position where the outer casing covers the mouthpiece and where the first switch is actuated such that electric power is prevented from being supplied from the battery to the first circuit board, and an open position where the outer casing uncovers the mouthpiece and where the second switch is actuated such that electric power is supplied from the battery to the first circuit board.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 7, 2021
    Assignee: Jabil Circuit (Shanghai) Co., Ltd.
    Inventors: Ying Li, Ying-Zhen Tong, Yi-Nong Zhao, Fang-Long Xu, Yong-Feng Song, Conor Mulcahy, Xiao Qiang Fei
  • Patent number: 11114347
    Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a semiconductor device includes a first gate structure and a second gate structure on a substrate; wherein the first gate structure includes a first gate dielectric layer having a first material, and the second gate structure includes a second gate dielectric layer having a second material, the first material being different from the second material, wherein the first and the second gate structures further comprises a first and a second self-protective layers disposed on the first and the second gate dielectric layers respectively, wherein the first self-protective layer comprises metal phosphate and the second self-protective layer comprises boron comprising complex agents and a first work function tuning layer on the first self-protective layer in the first gate structure.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: September 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20210273551
    Abstract: A neutral-point voltage balance control method and system for a three-level converter in a full power factor range. The method includes: using a large, medium, and zero vector modulation method to synthesize a reference voltage vector, and duty cycles of a large vector, a medium vector, and a zero vector; obtaining a voltage difference between two dc-link capacitors of signal acquisition, and the voltage difference as a neutral-point potential of the three-level converter; according to a value relationship between the neutral-point potential of the three-level converter and a specified threshold, selecting a small vector and calculating a duty cycle of the small vector; and updating a duty cycle of each basic vector, and obtaining a switching sequence for controlling a power switch of a three-phase bridge arm. An amplitude of a common-mode voltage of an NPC three-level converter is equal to one sixth of a dc-link voltage.
    Type: Application
    Filed: June 18, 2019
    Publication date: September 2, 2021
    Applicant: SHANDONG UNIVERSITY
    Inventors: Chenghui ZHANG, Changwei QIN, Xiaoyan LI, Xiangyang XING, Shunquan HU, Ying JIANG, Alian CHEN
  • Publication number: 20210274106
    Abstract: A video processing method, apparatus, and device and a storage medium are provided. The method includes: monitoring an operation indication inputted by a user through a personal homepage on a social platform, the personal homepage being used for displaying personal information of the user; obtaining, when the operation indication is a shooting indication for shooting a personal status video, the personal status video; uploading the personal status video to a back-end server of the social platform; and displaying indication information of the personal status video in a personal-information display region of the personal homepage.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Inventors: Man LIU, Su CAO, Hongfa QIU, Zhe YAN, Mingsan WANG, Qinhong ZHENG, Qi TANG, Ziping HE, Shihai CHENG, Dong HUANG, Dongxuan ZHANG, Runjia HUANG, Junjie ZHOU, Jingchao SUO, Jin JIANG, Yong LI, Zhenfeng CAI, Yuewei CHEN, Leteng WENG, Zhenan GUAN, Yuan ZHAO, Yiheng LIU, Ying QI
  • Publication number: 20210272941
    Abstract: A package structure including a first redistribution layer, a semiconductor die, through insulator vias, an insulating encapsulant and a second redistribution layer. The first redistribution layer includes a dielectric layer, a conductive layer, and connecting portions electrically connected to the conductive layer. The dielectric layer has first and second surfaces, the connecting portions has a first side, a second side, and sidewalls joining the first side to the second side. The first side of the connecting portions is exposed from and coplanar with the first surface of the dielectric layer. The semiconductor die is disposed on the second surface of the dielectric layer. The through insulator vias are connected to the conductive layer. The insulating encapsulant is disposed on the dielectric layer and encapsulating the semiconductor die and the through insulator vias. The second redistribution layer is disposed on the semiconductor die and over the insulating encapsulant.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo, Ban-Li Wu, Ying-Cheng Tseng, Chi-Hui Lai
  • Patent number: 11107382
    Abstract: A shift register, a method for driving the same, a gate driving circuit and a display device are provided. The shift register includes an input sub-circuit, a pull-down control sub-circuit, an output sub-circuit and a reset sub-circuit. The pull-down control sub-circuit is connected to a first signal input terminal, a pull-up node, a pull-down node and a first power terminal, and is configured to supply a first voltage signal of the first power terminal to the pull-down node under the control of the first input signal and a potential of the pull-up node. The output sub-circuit is connected to the first node and a second clock signal terminal, and is configured to output a second clock signal of the second clock signal terminal to a first output terminal and a second output terminal under the control of the potential of the pull-up node.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: August 31, 2021
    Assignees: HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ying Wang, Meng Li, Aifeng Gao, Hongmin Li