Patents by Inventor Yingli LIU

Yingli LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11086163
    Abstract: A reflective liquid crystal display includes an array substrate. The reflective liquid crystal display includes a plurality of raised reflective electrodes disposed on the array substrate. The reflective liquid crystal display includes a color film substrate. The reflective liquid crystal display includes a plurality of raised electrodes are provided on the color film substrate. The array substrate and the color film substrate are disposed opposite to each other such that the raised reflective electrodes and the raised electrodes face each other.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: August 10, 2021
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xiaojuan Wu, Chuncheng Che, Yingli Liu
  • Publication number: 20210011338
    Abstract: A reflective liquid crystal display includes an array substrate. The reflective liquid crystal display includes a plurality of raised reflective electrodes disposed on the array substrate. The reflective liquid crystal display includes a color film substrate. The reflective liquid crystal display includes a plurality of raised electrodes are provided on the color film substrate. The array substrate and the color film substrate are disposed opposite to each other such that the raised reflective electrodes and the raised electrodes face each other.
    Type: Application
    Filed: April 25, 2018
    Publication date: January 14, 2021
    Inventors: Xiaojuan Wu, Chuncheng Che, Yingli Liu
  • Patent number: 10580836
    Abstract: An OLED touch display panel, a method for manufacturing an OLED touch display panel and a touch display device are disclosed. The method comprises: forming a plurality of baffles by a patterning process on a TFT back plate, wherein each of the baffles defines a touch region; and forming a cathode layer on the TFT back plate on which the baffles have been formed. The cathode layer is partitioned by the baffles into a plurality of self-capacitance electrodes insulated from each other. Each of the self-capacitance electrodes is located within one of the touch regions and matches the touch region in shape.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: March 3, 2020
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Shengji Yang, Xue Dong, Xiaochuan Chen, Minghua Xuan, Pengcheng Lu, Weifeng Han, Huijuan Wang, Jing Yu, Yingli Liu, Limin Yu
  • Publication number: 20190326359
    Abstract: An OLED touch display panel, a method for manufacturing an OLED touch display panel and a touch display device are disclosed. The method comprises: forming a plurality of baffles by a patterning process on a TFT back plate, wherein each of the baffles defines a touch region; and forming a cathode layer on the TFT back plate on which the baffles have been formed. The cathode layer is partitioned by the baffles into a plurality of self-capacitance electrodes insulated from each other. Each of the self-capacitance electrodes is located within one of the touch regions and matches the touch region in shape.
    Type: Application
    Filed: January 3, 2018
    Publication date: October 24, 2019
    Inventors: Shengji YANG, Xue DONG, Xiaochuan CHEN, Minghua XUAN, Pengcheng LU, Weifeng HAN, Huijuan WANG, Jing YU, Yingli LIU, Limin YU
  • Publication number: 20080080249
    Abstract: A non-volatile memory having a memory cell formed on a substrate is provided. A trench is formed in the substrate. The memory cell has a first gate, a second gate, a charge storage layer, a first source/drain region and a second source/drain region. The first gate is disposed in the trench of the substrate. The second gate is disposed on the substrate at one side of the trench. The charge storage layer is disposed between the first gate and the substrate and between the second gate and the substrate. The first source/drain region is disposed in the substrate at the bottom of the trench. The second source/drain region is disposed in the substrate at one side of the second gate.
    Type: Application
    Filed: June 13, 2007
    Publication date: April 3, 2008
    Applicant: POWERCHIP SEMICONDUCTOR CORP.
    Inventors: Shi-Hsien Chen, Chao-Wei Kuo, Saysamone Pittikoun, Michael Yingli Liu