Patents by Inventor Ying Ling Tseng

Ying Ling Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230307231
    Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.
    Type: Application
    Filed: June 2, 2023
    Publication date: September 28, 2023
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Patent number: 11705328
    Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: July 18, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Publication number: 20220216053
    Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a handle substrate; a device layer overlying the handle substrate; and an insulator layer separating the handle substrate from the device layer. The insulator layer meets the device layer at a first interface and meets the handle substrate at a second interface. The insulator layer comprises a getter material having a getter concentration profile. The handle substrate contains getter material and has a handle getter concentration profile. The handle getter concentration profile has a peak at the second interface and a gradual decline beneath the second interface until reaching a handle getter concentration.
    Type: Application
    Filed: March 22, 2022
    Publication date: July 7, 2022
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Patent number: 11289330
    Abstract: Various embodiments of the present application are directed towards a method for forming a semiconductor-on-insulator (SOI) substrate with a thick device layer and a thick insulator layer. In some embodiments, the method includes forming an insulator layer covering a handle substrate, and epitaxially forming a device layer on a sacrificial substrate. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates, and the sacrificial substrate is removed. The removal includes performing an etch into the sacrificial substrate until the device layer is reached. Because the device layer is formed by epitaxy and transferred to the handle substrate, the device layer may be formed with a large thickness. Further, because the epitaxy is not affected by the thickness of the insulator layer, the insulator layer may be formed with a large thickness.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: March 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng
  • Publication number: 20210098253
    Abstract: Various embodiments of the present application are directed towards a method for forming a semiconductor-on-insulator (SOI) substrate with a thick device layer and a thick insulator layer. In some embodiments, the method includes forming an insulator layer covering a handle substrate, and epitaxially forming a device layer on a sacrificial substrate. The sacrificial substrate is bonded to a handle substrate, such that the device layer and the insulator layer are between the sacrificial and handle substrates, and the sacrificial substrate is removed. The removal includes performing an etch into the sacrificial substrate until the device layer is reached. Because the device layer is formed by epitaxy and transferred to the handle substrate, the device layer may be formed with a large thickness. Further, because the epitaxy is not affected by the thickness of the insulator layer, the insulator layer may be formed with a large thickness.
    Type: Application
    Filed: July 30, 2020
    Publication date: April 1, 2021
    Inventors: Cheng-Ta Wu, Chia-Ta Hsieh, Kuo Wei Wu, Yu-Chun Chang, Ying Ling Tseng