Patents by Inventor Ying-Lun Tsue

Ying-Lun Tsue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230006694
    Abstract: Systems and methods which provide parallel processing of multiple message bundles for a codeword undergoing a decoding process are described. Embodiments provide low-latency segmented quasi-cyclic low-density parity-check (QC-LDPC) decoder configurations in which decoding process tasks are allocated to different segments of the low-latency segmented QC-LDPC decoder for processing multiple bundles of messages in parallel. A segmented shifter of a low-latency segmented QC-LDPC decoder implementation may be configured to process multiple bundles of a plurality of edge paths in parallel. Multiple bundles of messages of a same check node cluster (CNC) are processed in parallel. Additionally, multiple bundles of messages of a plurality of CNCs are processed in parallel.
    Type: Application
    Filed: July 2, 2021
    Publication date: January 5, 2023
    Inventors: Hing-Mo Lam, Hin-Tat Chan, Ying-Lun Tsue, Zhonghui Zhang, Man-Wai Kwan, Kong-Chau Tsang