Patents by Inventor Ying Ni
Ying Ni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240183747Abstract: A rapid detection tool for a coaxial relationship based on a photosensitive material and a detection method using the same are used to detect coaxiality of two through-holes in the same workpiece to be detected. An image processing unit and a control unit are mounted outside a light-shielding box. Light sources, cameras, sensors, and an air cylinder are mounted in the light-shielding box. A photosensitive plate coated with a photosensitive resin is placed between the two holes, and two sides are irradiated by the light sources. Coordinates of centers of circular patterns formed on the photosensitive plate are calculated so that a coaxial relationship between the two holes can be accurately obtained. An output rod of the air cylinder is controlled to extend outward to reject a workpiece to be detected not meeting requirements.Type: ApplicationFiled: February 25, 2022Publication date: June 6, 2024Applicant: JIANGSU UNIVERSITYInventors: Yun WANG, Lihui REN, Fuzhu LI, Zhenying XU, Kun ZHANG, Wang NI, Ying YAN, Weili LIU, Peiyu HE, Xu DING
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Patent number: 12000766Abstract: An automatically-cleanable thickening performance evaluation instrument for drilling LCMs includes a cleaning device, a kettle body, a thickening motor, a heating component, a test ending component, a top cover, and a bottom cover, where upper and lower ends of the kettle body are both opened; the kettle body is arranged in a third bearing inner race, a third bearing outer race is connected to a first limb, and the first limb is configured to limit a position of the kettle body; and the kettle body is detachably connected to the thickening motor and driven by the thickening motor to rotate. The instrument can realize electric heating and air pressurization to simulate the underground environment, and the kettle body can be completely sealed, such that a measured thickening time is close to an actual thickening time. Moreover, the instrument can be automatically cleaned at the end of a test.Type: GrantFiled: February 15, 2022Date of Patent: June 4, 2024Assignee: CHENGDU UNIVERSITY OF TECHNOLOGYInventors: Jiping She, Hao Zhang, Yang Yang, Bin Yang, Yang Li, Jianjun Ni, Shiyu Zhang, Ying Zhong
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Publication number: 20240172374Abstract: A bracket module and a computing device including the bracket module are disclosed. The bracket module includes a housing structure. The housing structure includes a plurality of slots. Each slot is configured to accept a device inserted therein. The housing structure is configured for attachment in a chassis of the computing device. The bracket module further includes a tray structure. The tray structure includes a fixed end connected to the housing structure and a free end opposite from the fixed end. The tray structure is configured to rotate relative to the housing structure about the fixed end. The bracket module further includes at least one fastener configured to engage the tray structure with the housing structure in an open position.Type: ApplicationFiled: November 21, 2022Publication date: May 23, 2024Inventors: Yaw-Tzorng TSORNG, Tung-Hsien WU, Yu-Ying TSENG, Hsiang-Pu NI
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Patent number: 11983474Abstract: A method for verifying an integrated circuit (IC) design described in a hardware description or hardware verification language (HDHVL) is provided. The method includes identifying connections between random variables and coverage areas of the IC design, as described in HDHVL code, the connections being identified by determining which coverage areas of the IC design will be influenced during simulation by which random variables. The method can further include storing the identified connections in a database, and using, by a processor, connections retrieved from the database to simulate and verify the coverage areas of the IC design.Type: GrantFiled: December 23, 2021Date of Patent: May 14, 2024Assignee: Synopsys, Inc.Inventors: Parijat Biswas, Badri Gopalan, Enzhi Ni, Danish Jawed, Ying Chen, Jiang Chen
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Publication number: 20230385487Abstract: The disclosed relates to a hybrid traffic flow motion behavior modeling method based on an inference graph, wherein the method comprises: obtaining scene information, representing all traffic participants in the scene as vertices, and using directed edges to represent interaction relationships among traffic participants, so as to obtain the interaction graph; obtaining all possible interaction situations according to the interaction graph; based on each possible interaction situation, estimating the trajectory of each traffic participant in the interaction situation, and judging whether the trajectory conforms to a preset empirical decision-making criteria, so as to judge rationality of the interaction situation; and judging the rationality of all possible interaction situations obtained in the interaction situation generation step in turn until an interaction situation satisfying the rationality is found, and taking a trajectory of each traffic participant corresponding to the interaction situation as a finaType: ApplicationFiled: May 31, 2023Publication date: November 30, 2023Applicant: TONGJI UNIVERSITYInventors: Jian Sun, Donghao Zhou, Ying Ni
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Patent number: 11040085Abstract: A pharmaceutical composition containing F1 polypeptide and/or F3 polypeptide and a use thereof are provided. The pharmaceutical composition is made into a common dosage form, such as an emulsion and an ointment, and used for treating a disease, such as a wart associated with a HPV infection, or a solid tumor associated with or not associated with the HPV infection.Type: GrantFiled: June 27, 2019Date of Patent: June 22, 2021Inventors: Tian-Fang Wang, Guo-Ying Ni, Xiao-Song Liu
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Publication number: 20190374603Abstract: A pharmaceutical composition containing F1 polypeptide and/or F3 polypeptide and a use thereof are provided. The pharmaceutical composition is made into a common dosage form, such as an emulsion and an ointment, and used for treating a disease, such as a wart associated with a HPV infection, or a solid tumor associated with or not associated with the HPV infection.Type: ApplicationFiled: June 27, 2019Publication date: December 12, 2019Inventors: Tian-Fang Wang, GUO-YING NI, XIAO-SONG LIU
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Patent number: 8698325Abstract: An integrated circuit (IC) package includes an IC chip and a package carrier. The IC chip includes a substrate and an IC layered structure configured on an active surface of the substrate. The IC layered structure includes a first physical layer interface and a second physical layer interface. The first physical layer interface includes a plurality of first bump pads and a plurality of first inner pads electrically connected to the first bump pads, respectively. The second physical layer interface includes a plurality of second bump pads and a plurality of second inner pads electrically connected to the second bump pads, respectively. The second bump pads are mirror images of the first bump pads with respect to a first geometric plane perpendicular to the active surface. The second inner pads are mirror images of the first inner pads with respect to the first geometric plane.Type: GrantFiled: March 17, 2011Date of Patent: April 15, 2014Assignee: VIA Technologies, Inc.Inventors: Wen-Yuan Chang, Yu-Kai Chen, Yeh-Chi Hsu, Ying-Ni Lee, Wei-Chih Lai
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Publication number: 20120098125Abstract: An integrated circuit (IC) package includes an IC chip and a package carrier. The IC chip includes a substrate and an IC layered structure configured on an active surface of the substrate. The IC layered structure includes a first physical layer interface and a second physical layer interface. The first physical layer interface includes a plurality of first bump pads and a plurality of first inner pads electrically connected to the first bump pads, respectively. The second physical layer interface includes a plurality of second bump pads and a plurality of second inner pads electrically connected to the second bump pads, respectively. The second bump pads are mirror images of the first bump pads with respect to a first geometric plane perpendicular to the active surface. The second inner pads are mirror images of the first inner pads with respect to the first geometric plane.Type: ApplicationFiled: March 17, 2011Publication date: April 26, 2012Applicant: VIA TECHNOLOGIES, INC.Inventors: Wen-Yuan Chang, Yu-Kai Chen, Yeh-Chi Hsu, Ying-Ni Lee, Wei-Chih Lai
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Patent number: 7615708Abstract: An arrangement of non-signal through vias suitable for a wiring board is provided. The wiring board has a contact surface, a core layer and pads. The contact pads are disposed on the contact surface, while the arrangement of non-signal through vias includes first non-signal through vias and a second non-signal through via. The first non-signal through vias pass through the core layer and are electrically connected to some of the contact pads. The second non-signal through via which passes through the core layer is disposed between the first non-signal through vias and is not electrically connected to the contact pads. The interval between the second non-signal through via and anyone of the surrounding first non-signal through vias is smaller than or equal to 0.72 times of the minimum interval between any two of the contact pads electrically connected to the corresponding first non-signal through vias.Type: GrantFiled: May 30, 2006Date of Patent: November 10, 2009Assignee: VIA Technologies, Inc.Inventors: Hsing-Chou Hsu, Ying-Ni Lee
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Publication number: 20070194432Abstract: An arrangement of non-signal through vias suitable for a wiring board is provided. The wiring board has a contact surface, a core layer and pads. The contact pads are disposed on the contact surface, while the arrangement of non-signal through vias includes first non-signal through vias and a second non-signal through via. The first non-signal through vias pass through the core layer and are electrically connected to some of the contact pads. The second non-signal through via which passes through the core layer is disposed between the first non-signal through vias and is not electrically connected to the contact pads. The interval between the second non-signal through via and anyone of the surrounding first non-signal through vias is smaller than or equal to 0.72 times of the minimum interval between the second non-signal through via and one of the contact pads electrically connected to the corresponding first non-signal through vias.Type: ApplicationFiled: May 30, 2006Publication date: August 23, 2007Inventors: Hsing-Chou Hsu, Ying-Ni Lee
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Publication number: 20070096121Abstract: A light emitting diode and a method for manufacturing the same are provided. The light emitting diode includes: a transparent substrate made of AlxGa1-xAs; a light emitting layer made of AlGaInP, stacked on the transparent substrate, and having a multiple layered epitaxially growing structure; a window layer made of GaP, stacked on the light emitting layer, and having a transparent structure with a great bandgap; an upper electrode layer overlying the window layer; and a lower electrode layer underlying the transparent substrate, wherein the x-value in AlxGa1-xAs is set to corresponding to the emission wavelengths of the light emitting layer so that the transparent substrate can have a great bandgap which make it to be transparent to the light emitted by the light emitting layer; and a window layer is used to increase the current diffusion from the upper electrode layer to the light emitting layer.Type: ApplicationFiled: October 28, 2005Publication date: May 3, 2007Inventors: Ying Ni, Kuo Nee, Ming Hung
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Patent number: D1024932Type: GrantFiled: March 10, 2022Date of Patent: April 30, 2024Assignee: WALSIN LIHWA CORPORATIONInventors: Ko-Ming Chen, Shih-Hsiang Wang, An-Hung Lin, Min-Chuan Wu, Shao-Pei Lin, Chien-Chung Ni, Chun-Ying Lin