Patents by Inventor Ying-Ting Chang

Ying-Ting Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • EFFICIENT RADIO SWITCH FOR OPTIMIZING POWER CONSUMPTION IN LOW POWER SCENARIO
    Publication number: 20240080117
    Abstract: The present invention provides a wireless communication method of an electronic device, wherein the electronic device includes a first radio and a second radio, a maximum bandwidth or a maximum. NSS supported by the first radio is different from a maximum bandwidth or a maximum NSS supported by the second radio. The wireless communication method includes the step of: using the first radio to communicate with another electronic device; determining if parameters of the electronic device satisfy a condition; and in response to the parameters of the electronic device satisfying the condition, enabling the second radio and using the second radio to communicate with the another electronic device, and disabling the first radio.
    Type: Application
    Filed: August 9, 2023
    Publication date: March 7, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ying-You Lin, Jun-Wei Lin, Ren-Fang Gan, Ding-Yuh Hwang, Po-Ting Kao, Chia-Ning Chang, Ssu-Ying Hung
  • High voltage device embedded non-volatile memory cell and fabrication method
    Patent number: 7091535
    Abstract: A high voltage PMOS device having an improved breakdown voltage is achieved. An asymmetrical high voltage integrated circuit structure comprises a gate electrode on a substrate and source and drain regions within the substrate on either side and adjacent to the gate electrode wherein the source region is encompassed by an n-well. A symmetrical high voltage integrated circuit structure comprises a gate electrode on a substrate, source and drain regions within the substrate on either side and adjacent to the gate electrode, and an n-well in the substrate underlying the gate electrode. The n-well in both structures shifts the breakdown point from the silicon surface to the bottom of the source or drain regions.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: August 15, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hung-Chih Tsai, Chien-Chih Chou, Ying-Ting Chang, Che-Jung Chu, Kuo-Chio Liu
  • High voltage device embedded non-volatile memory cell and fabrication method
    Publication number: 20050194647
    Abstract: A high voltage PMOS device having an improved breakdown voltage is achieved. An asymmetrical high voltage integrated circuit structure comprises a gate electrode on a substrate and source and drain regions within the substrate on either side and adjacent to the gate electrode wherein the source region is encompassed by an n-well. A symmetrical high voltage integrated circuit structure comprises a gate electrode on a substrate, source and drain regions within the substrate on either side and adjacent to the gate electrode, and an n-well in the substrate underlying the gate electrode. The n-well in both structures shifts the breakdown point from the silicon surface to the bottom of the source or drain regions.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 8, 2005
    Inventors: Hung-Chih Tsai, Chien-Chih Chou, Ying-Ting Chang, Che-Jung Chu, Kuo-Chio Liu