Patents by Inventor Ying TONG

Ying TONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12356865
    Abstract: A seed layer stack with a uniform top surface having a peak to peak roughness of 0.5 nm is formed by sputter depositing an amorphous layer on a smoothing layer such as Mg where the latter has a resputtering rate 2 to 30× that of the amorphous layer. The uppermost seed layer is NiW, NiMo, or one or more of NiCr, NiFeCr, and Hf while the bottommost seed layer is one or more of Ta, TaN, Zr, ZrN, Nb, NbN, Mo, MON, TIN, W, WN, and Ru. Accordingly, perpendicular magnetic anisotropy in an overlying magnetic layer is substantially maintained during high temperature processing up to 400° C. and is advantageous for magnetic tunnel junctions in embedded MRAMs, spintronic devices, or in read head sensors. The amorphous seed layer is SiN, TaN, or CoFeM where M is B or another element with a content that makes CoFeM amorphous as deposited.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: July 8, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jian Zhu, Guenole Jan, Yuan-Jen Lee, Huanlong Liu, Ru-Ying Tong, Jodi Mari Iwata, Vignesh Sundar, Luc Thomas, Yu-Jen Wang, Sahil Patel
  • Publication number: 20250208279
    Abstract: A method for dynamic pairing between asset tracking devices, such as a chassis module and a chassis sensor module mounted on a chassis and a container module mounted on a container. The method includes detecting presence of the container using the chassis sensor module and in response, broadcasting a short-range polling signal; establishing a wireless connection with the container module in response to the short-range polling signal; obtaining GNSS data; determining an estimated distance between the chassis module and the container module; and transmitting the GNSS data and the estimated distance to a remote server.
    Type: Application
    Filed: December 22, 2023
    Publication date: June 26, 2025
    Applicant: BlackBerry Limited
    Inventors: Mahendra FULESHWAR PRASAD, Scott Leonard DILL, Adam Paul JOCKSCH, Steven Joseph MACDONALD, Mark Edward REAUME, Jason Wayne JANTZI, Ying Tong MAN, Yu GAO
  • Publication number: 20250189461
    Abstract: A test method for a wafer is provided. First, data of an optical characteristic of a test key of the wafer is acquired using an optical scatterometer. The wafer has chip areas and a frame area surrounding and separating the chip areas. The test key is disposed in the frame area. Then, the data is compared with corresponding data of a standard sample without a crack, and a difference between the data and the corresponding date is obtained. It is determined that a crack is formed in the test key and a crack condition in the chip areas does not meet a criterion of the wafer when the difference is larger than a tolerance. It is determined that the crack condition in the chip areas meets the criterion of the wafer when the difference is smaller than or equal to the tolerance.
    Type: Application
    Filed: January 17, 2024
    Publication date: June 12, 2025
    Inventor: Ying TONG
  • Patent number: 12249450
    Abstract: An improved magnetic tunnel junction with two oxide interfaces on each side of a ferromagnetic layer (FML) leads to higher PMA in the FML. The novel stack structure allows improved control during oxidation of the top oxide layer. This is achieved by the use of a FML with a multiplicity of ferromagnetic sub-layers deposited in alternating sequence with one or more non-magnetic layers. The use of non-magnetic layers each with a thickness of 0.5 to 10 Angstroms and with a high resputtering rate provides a smoother FML top surface, inhibits crystallization of the FML sub-layers, and reacts with oxygen to prevent detrimental oxidation of the adjoining ferromagnetic sub-layers. The FML can function as a free or reference layer in an MTJ. In an alternative embodiment, the non-magnetic material such as Mg, Al, Si, Ca, Sr, Ba, and B is embedded by co-deposition or doped in the FML layer.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: March 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Luc Thomas, Guenole Jan, Ru-Ying Tong
  • Patent number: 12213385
    Abstract: A magnetic device for magnetic random access memory (MRAM), spin torque MRAM, or spin torque oscillator technology is disclosed wherein a magnetic tunnel junction (MTJ) with a sidewall is formed between a bottom electrode and a top electrode. A passivation layer that is a single layer or multilayer comprising one of B, C, or Ge, or an alloy thereof wherein the B, C, and Ge content, respectively, is at least 10 atomic % is formed on the MTJ sidewall to protect the MTJ from reactive species during subsequent processing including deposition of a dielectric layer that electrically isolates the MTJ from adjacent MTJs, and during annealing steps around 400° C. in CMOS fabrication. The single layer is about 3 to 10 Angstroms thick and may be an oxide or nitride of B, C, or Ge. The passivation layer is preferably amorphous to prevent diffusion of reactive oxygen or nitrogen species.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jodi Mari Iwata, Guenole Jan, Ru-Ying Tong
  • Patent number: 12185641
    Abstract: A plasma enhanced chemical vapor deposition (PECVD) method is disclosed for forming a SiON encapsulation layer on a magnetic tunnel junction (MTJ) sidewall that minimizes attack on the MTJ sidewall during the PECVD or subsequent processes. The PECVD method provides a higher magnetoresistive ratio for the MTJ than conventional methods after a 400° C. anneal. In one embodiment, the SiON encapsulation layer is deposited using a N2O:silane flow rate ratio of at least 1:1 but less than 15:1. A N2O plasma treatment may be performed immediately following the PECVD to ensure there is no residual silane in the SiON encapsulation layer. In another embodiment, a first (lower) SiON sub-layer has a greater Si content than a second (upper) SiON sub-layer. A second encapsulation layer is formed on the SiON encapsulation layer so that the encapsulation layers completely fill the gaps between adjacent MTJs.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: December 31, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Vignesh Sundar, Yu-Jen Wang, Dongna Shen, Sahil Patel, Ru-Ying Tong
  • Patent number: 12167699
    Abstract: A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a boron containing free layer (FL) is subjected to a plasma treatment with inert gas, and a natural oxidation (NOX) process to form B2O3 before overlying layers are deposited. A metal layer such as Mg is deposited on the FL as a first step in forming a Hk enhancing layer that increases FL perpendicular magnetic anisotropy, or as a first step in forming a tunnel barrier layer on the FL. One or more anneal steps are essential in assisting B2O3 segregation from the free layer and thereby increasing the FL magnetic moment. A post-oxidation plasma treatment may also be used to partially remove B2O3 proximate to the FL top surface before the metal layer is deposited. Both plasma treatments use low power (<50 Watts) to remove a maximum of 2 Angstroms FL thickness.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guenole Jan, Jodi Mari Iwata, Ru-Ying Tong, Huanlong Liu, Yuan-Jen Lee, Jian Zhu
  • Publication number: 20240381780
    Abstract: A method of forming a MTJ with a tunnel barrier having a high tunneling magnetoresistance ratio, and low resistance×area value is disclosed. The method preserves perpendicular magnetic anisotropy in bottom and top magnetic layers that adjoin bottom and top surfaces of the tunnel barrier. A key feature is a passive oxidation step of a first Mg layer that is deposited on the bottom magnetic layer wherein a maximum oxygen pressure is 10-5 torr. A bottom portion of the first Mg layer remains unoxidized thereby protecting the bottom magnetic layer from substantial oxidation during subsequent oxidation and anneal processes that are employed to complete the fabrication of the tunnel barrier and MTJ. An uppermost Mg layer may be formed as the top layer in the tunnel barrier stack before a top magnetic layer is deposited.
    Type: Application
    Filed: July 24, 2024
    Publication date: November 14, 2024
    Inventors: Huanlong Liu, Jian Zhu, Keyu Pi, Ru-Ying Tong
  • Publication number: 20240381779
    Abstract: A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a boron containing free layer (FL) is subjected to a plasma treatment with inert gas, and a natural oxidation (NOX) process to form B2O3 before overlying layers are deposited. A metal layer such as Mg is deposited on the FL as a first step in forming a Hk enhancing layer that increases FL perpendicular magnetic anisotropy, or as a first step in forming a tunnel barrier layer on the FL. One or more anneal steps are essential in assisting B2O3 segregation from the free layer and thereby increasing the FL magnetic moment. A post-oxidation plasma treatment may also be used to partially remove B2O3 proximate to the FL top surface before the metal layer is deposited. Both plasma treatments use low power (<50 Watts) to remove a maximum of 2 Angstroms FL thickness.
    Type: Application
    Filed: July 22, 2024
    Publication date: November 14, 2024
    Inventors: Guenole Jan, Jodi Mari Iwata, Ru-Ying Tong, Huanlong Liu, Yuan-Jen Lee, Jian Zhu
  • Publication number: 20240379270
    Abstract: An improved magnetic tunnel junction with two oxide interfaces on each side of a ferromagnetic layer (FML) leads to higher PMA in the FML. The novel stack structure allows improved control during oxidation of the top oxide layer. This is achieved by the use of a FML with a multiplicity of ferromagnetic sub-layers deposited in alternating sequence with one or more non-magnetic layers. The use of non-magnetic layers each with a thickness of 0.5 to 10 Angstroms and with a high resputtering rate provides a smoother FML top surface, inhibits crystallization of the FML sub-layers, and reacts with oxygen to prevent detrimental oxidation of the adjoining ferromagnetic sub-layers. The FML can function as a free or reference layer in an MTJ. In an alternative embodiment, the non-magnetic material such as Mg, Al, Si, Ca, Sr, Ba, and B is embedded by co-deposition or doped in the FML layer.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: Luc Thomas, Guenole Jan, Ru-Ying Tong
  • Publication number: 20240357754
    Abstract: Devices and methods for detecting and reporting a battery tamper event with regard to an intrinsically-safe or explosion-proof device while the device is located in a hazardous environment. The device may include a location sensor for determining that the device is in a hazardous location. While in the hazardous location, the device may detect an open enclosure event using a sensor and, if so, it may monitor for detection of a battery tampering event. The battery tampering event may include battery replacement or battery charging. The battery tamper event may be reported to a remote server over a wireless channel when it occurs.
    Type: Application
    Filed: April 19, 2023
    Publication date: October 24, 2024
    Applicant: BlackBerry Limited
    Inventors: Jonathan Quinn BRUBACHER, Mahendra FULESHWAR PRASAD, Yu GAO, Scott Leonard DILL, Cortez CORLEY, Ying Tong Man
  • Patent number: 12082509
    Abstract: A dual magnetic tunnel junction (DMTJ) is disclosed with a PL1/TB1/free layer/TB2/PL2/capping layer configuration wherein a first tunnel barrier (TB1) has a substantially lower resistance x area (RA1) product than RA2 for an overlying second tunnel barrier (TB2) to provide an acceptable net magnetoresistive ratio (DRR). Moreover, magnetizations in first and second pinned layers, PL1 and PL2, respectively, are aligned antiparallel to enable a lower critical switching current than when in a parallel alignment. An oxide capping layer having a RACAP is formed on PL2 to provide higher PL2 stability. The condition RA1<RA2 and RACAP<RA2 is achieved when TB1 and the oxide capping layer have one or both of a smaller thickness and a lower oxidation state than TB2, are comprised of conductive (metal) channels in a metal oxide or metal oxynitride matrix, or are comprised of a doped metal oxide or doped metal oxynitride layer.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Vignesh Sundar, Yu-Jen Wang, Luc Thomas, Guenole Jan, Sahil Patel, Ru-Ying Tong
  • Publication number: 20240220668
    Abstract: An Internet of Things device and method for controlling the flow of power to a device through remote instructions. The device may include a battery and a switch coupling the battery to a main circuit, the switch including a sensor detecting a first condition. While detecting the first condition, the switch may be open-circuited, decoupling the battery from the main circuit. While not detecting the first condition, the switch is close-circuited, coupling the battery to the main circuit and providing power. The device may further include a controller coupled to a wireless communications module, which may receive instructions from a remote server. These instructions may instruct the controller to send a disable signal to the switch, preventing the switch from becoming open-circuited when the sensor detects the first condition.
    Type: Application
    Filed: December 29, 2022
    Publication date: July 4, 2024
    Applicant: BlackBerry Limited
    Inventors: Mahendra FULESHWAR PRASAD, Scott Leonard DILL, Cortez CORLEY, Jonathan Quinn BRUBACHER, Ying Tong MAN
  • Patent number: 12027191
    Abstract: A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a free layer (FL) has a first interface with a MgO tunnel barrier, a second interface with a Mo or W Hk enhancing layer, and is comprised of FexCoyBz wherein x is 66-80, y is 5-9, z is 15-28, and (x+y+z)=100 to simultaneously provide a magnetoresistive ratio >100%, resistance x area product <5 ohm/?m2, switching voltage <0.15V (direct current), and sufficient Hk to ensure thermal stability to 400° C. annealing. The FL may further comprise one or more M elements such as O or N to give (FexCoyBz)wM100-w where w is >90 atomic %. Alternatively, the FL is a trilayer with a FeB layer contacting MgO to induce Hk at the first interface, a middle FeCoB layer for enhanced magnetoresistive ratio, and a Fe or FeB layer adjoining the Hk enhancing layer to increase thermal stability.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: July 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hideaki Fukuzawa, Vignesh Sundar, Yu-Jen Wang, Ru-Ying Tong
  • Patent number: 11956971
    Abstract: A fabrication process for an STT MTJ MRAM device includes steps of cooling the device at individual or at multiple stages in its fabrication. The cooling process, which may be equally well applied during the fabrication of other multi-layered devices, is demonstrated to produce an operational device that is more resistant to adverse thermal effects during operation that would normally cause a similar device not so fabricated to lose stored data and otherwise fail to operate properly.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huanlong Liu, Guenole Jan, Ru-Ying Tong, Jian Zhu, Yuan-Jen Lee, Jodi Mari Iwata, Sahil Patel, Vignesh Sundar
  • Patent number: 11930717
    Abstract: A synthetic antiferromagnetic structure for a spintronic device is disclosed and has an FL2/Co or Co alloy/antiferromagnetic coupling/Co or Co alloy/CoFeB configuration where FL2 is a ferromagnetic free layer with intrinsic PMA. Antiferromagnetic coupling is improved by inserting a Co or Co alloy dusting layer on top and bottom surfaces of the antiferromagnetic coupling layer. The FL2 layer may be a L10 ordered alloy, a rare earth-transition metal alloy, or an (A1/A2)n laminate where A1 is one of Co, CoFe, or an alloy thereof, and A2 is one of Pt, Pd, Rh, Ru, Ir, Mg, Mo, Os, Si, V, Ni, NiCo, and NiFe, or A1 is Fe and A2 is V. A method is also provided for forming the synthetic antiferromagnetic structure.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Robert Beach, Guenole Jan, Yu-Jen Wang, Ru-Ying Tong
  • Patent number: 11930716
    Abstract: A ferromagnetic layer is capped with a metallic oxide (or nitride) layer that provides a perpendicular-to-plane magnetic anisotropy to the layer. The surface of the ferromagnetic layer is treated with a plasma to prevent diffusion of oxygen (or nitrogen) into the layer interior. An exemplary metallic oxide layer is formed as a layer of metallic Mg that is plasma treated to reduce its grain size and enhance the diffusivity of oxygen into its interior. Then the plasma treated Mg layer is naturally oxidized and, optionally, is again plasma treated to reduce its thickness and remove the oxygen rich upper surface.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guenole Jan, Ru-Ying Tong
  • Patent number: 11852927
    Abstract: A display device includes: a gate line having an extension direction; a switch unit electrically connecting to the gate line; a pixel electrode electrically connecting to the switch unit; and a slit in the pixel electrode, wherein a virtual line parallel to the extension direction passes through an end point of the slit which is closest to the gate line, the pixel electrode is divided into a first portion and a second portion by the virtual line, and the first portion is closer to the gate line than the second portion, and wherein -the slit has a first width in the extension direction and a second width in the extension direction, the second width is closer to the first portion than the first width, and the first width is less than the second width.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: December 26, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Shun-Chen Yang, Ying-Tong Lin
  • Patent number: 11849646
    Abstract: A magnetic tunnel junction (MTJ) is disclosed wherein first and second interfaces of a free layer (FL) with a first metal oxide (Hk enhancing layer) and second metal oxide (tunnel barrier), respectively, produce perpendicular magnetic anisotropy (PMA) to increase thermal stability. In some embodiments, a capping layer that is a conductive metal nitride such as MoN contacts an opposite surface of the Hk enhancing layer with respect to the first interface to reduce interdiffusion of oxygen and nitrogen compared with a TiN capping layer and maintain an acceptable resistance×area (RA) product. In other embodiments, the capping layer may comprise an insulating nitride such as AlN that is alloyed with a conductive metal to minimize RA. Furthermore, a metallic buffer layer may be inserted between the capping layer and Hk enhancing layer. As a result, electrical shorts are reduced and the magnetoresistive ratio is increased.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: December 19, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jodi Mari Iwata, Guenole Jan, Ru-Ying Tong, Vignesh Sundar, Jian Zhu, Huanlong Liu
  • Patent number: D1082503
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: July 8, 2025
    Assignee: BlackBerry Limited
    Inventors: Cortez Corley, Joseph Orais Santiago, Yu Gao, Ying Tong Man