Abstract: A chip package and a package process thereof are provided. The chip package comprises a package substrate, a chip, a plurality of spacers, an adhesive layer, and a plurality of wires. The package substrate has a carrying surface. The chip is disposed on the carrying surface. The spacers are formed between the chip and the carrying surface to maintain an interval between the chip and the package substrate. The adhesive layer is disposed between the chip and carrying surface to encapsulate the spacers. The chip is electrically connected to the package substrate via the wires.

Abstract: The present invention relates to a stackable semiconductor package including a first substrate, a chip, a low modules film, a second substrate, a plurality of first wires, and a first molding compound. The chip is disposed on the first substrate. The low modules film is disposed on the chip. The second substrate is disposed on the low modules film. The area of the low modules film is adjusted according to the area of the second substrate, so as to support the second substrate. The first wires electrically connect the first substrate and the second substrate. Some pads of the second substrate are exposed outside the first molding compound. Therefore, the overhang portion of the second substrate will not shake or sway during a wire bonding process, and the area of the second substrate can be increased to receive more devices disposed thereon. In addition, the thickness of the second substrate can be reduced, so as to reduce the overall thickness of the stackable semiconductor package.

Abstract: The present invention relates to a stackable semiconductor package. The stackable semiconductor package includes a first substrate, a chip, a first molding compound, a second substrate, a plurality of first wires, and a second molding compound. The chip is disposed on the first substrate. The second substrate is disposed on the first molding compound. The area of the first molding compound is adjusted according to the area of the second substrate, so as to support the second substrate. The first wires electrically connect the first substrate and the second substrate. Some pads of the second substrate are exposed outside the second molding compound. Therefore, the second substrate will not shake or sway during a wire bonding process, and the area of the second substrate can be increased to receive more devices disposed thereon.

Abstract: A sensor chip for defining an exposed molding region is disclosed. The sensor chip includes a semiconductor chip and a metal dam bar protruding from the active surface of the semiconductor chip. The active surface of the semiconductor chip includes a sensing region and at least one bonding pad is disposed on the active surface. The metal dam bar separates the sensing region and the bonding pad to prevent contamination of the sensing region by the mold flash. Preferably, a step is formed on the periphery of the active surface of the semiconductor chip, such that the semiconductor chip includes a T-shaped profile. Additionally, the metal dam bar is extended to the step to form an enclosed ring thereby effectively defining an exposed molding region that contains the sensing region.

Abstract: A chip package and a package process thereof are provided. The chip package comprises a package substrate, a chip, a plurality of spacers, an adhesive layer, and a plurality of wires. The package substrate has a carrying surface. The chip is disposed on the carrying surface. The spacers are formed between the chip and the carrying surface to maintain an interval between the chip and the package substrate. The adhesive layer is disposed between the chip and carrying surface to encapsulate the spacers. The chip is electrically connected to the package substrate via the wires.

Abstract: A contact sensor package has a substrate, a film, a sealant and a plurality of contact sensors disposed on the substrate. The contact sensors are disposed within the enclosed space defined by the substrate, the film and the sealant. The contact sensor package further has at least a ground conductive trace formed on the substrate and an electrostatic charge dissipation layer formed on a surface of the film and electrically connected to the ground conductive trace. The electrostatic charge dissipation layer has an upper surface that serves as a contact surface for a detecting a contact work-piece.

Abstract: A chip on glass package. A glass substrate has a top surface and a corresponding bottom surface. A plurality of chips are flip-chip mounted on the top surface of the glass substrate. The bottom surface of the glass substrate is secured to and electrically connected with a carrier. An encapsulation material is formed around the glass substrate to seal the chips. The encapsulation material has a cavity to expose the contact area of the top surface of the glass substrate. Therefore the chip on glass package is to possess a better protection and electrical connection of the glass substrate.

Abstract: A sensor chip for defining an exposed molding region is disclosed. The sensor chip includes a semiconductor chip and a metal dam bar protruding from the active surface of the semiconductor chip. The active surface of the semiconductor chip includes a sensing region and at least one bonding pad is disposed on the active surface. The metal dam bar separates the sensing region and the bonding pad to prevent contamination of the sensing region by the mold flash. Preferably, a step is formed on the periphery of the active surface of the semiconductor chip, such that the semiconductor chip includes a T-shaped profile. Additionally, the metal dam bar is extended to the step to form an enclosed ring thereby effectively defining an exposed molding region that contains the sensing region.

Abstract: A contact sensor package has a substrate, a film, a sealant and a plurality of contact sensors disposed on the substrate. The contact sensors are disposed within the enclosed space defined by the substrate, the film and the sealant. The contact sensor package further has at least a ground conductive trace formed on the substrate and an electrostatic charge dissipation layer formed on a surface of the film and electrically connected to the ground conductive trace. The electrostatic charge dissipation layer has an upper surface that serves as a contact surface for a detecting a contact work-piece.

Abstract: A chip on glass package. A glass substrate has a top surface and a corresponding bottom surface. A plurality of chips are flip-chip mounted on the top surface of the glass substrate. The bottom surface of the glass substrate is secured to and electrically connected with a carrier. An encapsulation material is formed around the glass substrate to seal the chips. The encapsulation material has a cavity to expose the contact area of the top surface of the glass substrate. Therefore the chip on glass package is to possess a better protection and electrical connection of the glass substrate.