Patents by Inventor Yingwei Jiang

Yingwei Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming wire bonds in semiconductor devices
    Patent number: 8198737
    Abstract: A method of forming a wire bond in a semiconductor device includes forming a first bump of a first composition proximate to a probe mark on a bond pad. A second bump of the first composition is formed adjacent to the first bump such that the first and second bumps are formed away from the probe mark. A wire of a second composition that is harder than the first composition is attached on top of the first and second bumps to form an interconnection.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: June 12, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Changliang Zhang, Yingwei Jiang, Zhijie Wang, Wei Xiao
  • METHOD OF FORMING WIRE BONDS IN SEMICONDUCTOR DEVICES
    Publication number: 20100314754
    Abstract: A method of forming a wire bond in a semiconductor device includes forming a first bump of a first composition proximate to a probe mark on a bond pad. A second bump of the first composition is formed adjacent to the first bump such that the first and second bumps are formed away from the probe mark. A wire of a second composition that is harder than the first composition is attached on top of the first and second bumps to form an interconnection.
    Type: Application
    Filed: July 28, 2009
    Publication date: December 16, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Changliang ZHANG, Yingwei Jiang, Zhijie Wang, Wei Xiao