Patents by Inventor Ying-Yang SU
Ying-Yang SU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240421277Abstract: A pixel structure includes a first light-emitting diode for emitting a first light, wherein the first light-emitting diode has a first semiconductor layer, a first light-emitting surface, and a first electrode under the first semiconductor layer away from the first light-emitting surface; a second light-emitting diode for emitting a second light, wherein the second light-emitting diode has a second semiconductor layer, a second light-emitting surface, and a second electrode under the second semiconductor layer away from the second light-emitting surface; a dielectric layer surrounding and contacting the first semiconductor layer and the second light-emitting diode and exposing the first light-emitting surface, the first electrode, the second light-emitting surface and the second electrode; a common conductive structure having a semiconductor layer and a metal layer; and a light-transmitting conductive layer covering and electrical connecting the first light-emitting diode, the second light-emitting diode andType: ApplicationFiled: June 13, 2024Publication date: December 19, 2024Inventors: Min-Hsun HSIEH, Ying-Yang SU, Chien-Chih CHEN, Wei-Shan HU, Ching-Tai CHENG, Chung-Che TENG, Tai-Ni CHU, Hsin-Mao LIU
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Patent number: 12154885Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: GrantFiled: August 15, 2023Date of Patent: November 26, 2024Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Publication number: 20230395562Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: ApplicationFiled: August 15, 2023Publication date: December 7, 2023Applicant: EPISTAR CORPORATIONInventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
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Publication number: 20230335695Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2-150.Type: ApplicationFiled: June 21, 2023Publication date: October 19, 2023Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Ying-Yang SU
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Patent number: 11728310Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: GrantFiled: June 13, 2022Date of Patent: August 15, 2023Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Patent number: 11710812Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.Type: GrantFiled: May 27, 2021Date of Patent: July 25, 2023Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Hsin-Mao Liu, Ying-Yang Su
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Publication number: 20230117490Abstract: A semiconductor element arrangement structure is provided. The semiconductor element arrangement structure includes a carrier substrate, first and second adhesive layers respectively disposed on the carrier substrate and separated from each other, and first and second semiconductor elements disposed on the first and second adhesive layers, respectively. The first semiconductor element has first and second electrodes on the same side of the first semiconductor element, and the second semiconductor element has third and fourth electrodes on the same side of the second semiconductor element. The first adhesive layer is in direct contact with the first and second electrodes, and the second adhesive layer is in direct contact with the third and fourth electrodes. The first adhesive layer has a first width between the first and second electrodes and has a second width not between the first and second electrodes that is less than the first width.Type: ApplicationFiled: October 14, 2022Publication date: April 20, 2023Inventors: Chang-Tai HSIAO, Ying-Yang SU
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Patent number: 11588084Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: GrantFiled: January 22, 2020Date of Patent: February 21, 2023Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Patent number: 11530804Abstract: A light-emitting device includes a first light-emitting module, a second light-emitting module, a conductive layer and an insulation layer. The first light-emitting module includes a first substrate having a first cavity, a first sidewall, and a light-emitting component disposed on the first substrate. The second module includes a second substrate having a second cavity corresponding to the first cavity and a second sidewall corresponding to the first sidewall. The conductive layer is directly connected to the first cavity and the second cavity and electrically connect the first light-emitting module and the second light-emitting module. The insulation layer is directly connected to the first sidewall and the second sidewall.Type: GrantFiled: January 20, 2021Date of Patent: December 20, 2022Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Ying-Yang Su, Shih-An Liao, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Publication number: 20220310555Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: ApplicationFiled: June 13, 2022Publication date: September 29, 2022Applicant: EPISTAR CORPORATIONInventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
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Patent number: 11362060Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: GrantFiled: August 27, 2019Date of Patent: June 14, 2022Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Shih-An Liao, Ying-Yang Su, Hsin-Mao Liu, Tzu-Hsiang Wang, Chi-Chih Pu
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Publication number: 20210288232Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.Type: ApplicationFiled: May 27, 2021Publication date: September 16, 2021Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Ying-Yang SU
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Publication number: 20210222861Abstract: A light-emitting device includes a first light-emitting module, a second light-emitting module, a conductive layer and an insulation layer. The first light-emitting module includes a first substrate having a first cavity, a first sidewall, and a light-emitting component disposed on the first substrate. The second module includes a second substrate having a second cavity corresponding to the first cavity and a second sidewall corresponding to the first sidewall. The conductive layer is directly connected to the first cavity and the second cavity and electrically connect the first light-emitting module and the second light-emitting module. The insulation layer is directly connected to the first sidewall and the second sidewall.Type: ApplicationFiled: January 20, 2021Publication date: July 22, 2021Inventors: Min-Hsun HSIEH, Ying-Yang SU, Shih-An LIAO, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
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Patent number: 11024782Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.Type: GrantFiled: May 4, 2020Date of Patent: June 1, 2021Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Hsin-Mao Liu, Ying-Yang Su
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Publication number: 20200266177Abstract: A light-emitting device includes a light-emitting element having a first-type semiconductor layer, a second-type semiconductor layer, an active stack between the first-type semiconductor layer and the second-type semiconductor layer, a bottom surface, and a top surface. A first electrode is disposed on the bottom surface and electrically connected to the first-type semiconductor layer. A second electrode is disposed on the bottom surface and electrically connected to the second-type semiconductor layer. A supporting structure is disposed on the top surface. The supporting structure has a thickness and a maximum width. A ratio of the maximum width to the thickness is of 2˜150.Type: ApplicationFiled: May 4, 2020Publication date: August 20, 2020Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Ying-Yang SU
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Publication number: 20200243737Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: ApplicationFiled: January 22, 2020Publication date: July 30, 2020Applicant: EPISTAR CORPORATIONInventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
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Publication number: 20200243478Abstract: Disclosed is a die-bonding method which provides a target substrate having a circuit structure with multiple electrical contacts and multiple semiconductor elements each semiconductor element having a pair of electrodes, arranges the multiple semiconductor elements on the target substrate with the pair of electrodes of each semiconductor element aligned with two corresponding electrical contacts of the target substrate, and applies at least one energy beam to join and electrically connect the at least one pair of electrodes of every at least one of the multiple semiconductor elements and the corresponding electrical contacts aligned therewith in a heating cycle by heat carried by the at least one energy beam in the heating cycle. The die-bonding method delivers scattering heated dots over the target substrate to avoid warpage of PCB and ensures high bonding strength between the semiconductor elements and the circuit structure of the target substrate.Type: ApplicationFiled: August 27, 2019Publication date: July 30, 2020Applicant: EPISTAR CORPORATIONInventors: Min-Hsun HSIEH, Shih-An LIAO, Ying-Yang SU, Hsin-Mao LIU, Tzu-Hsiang WANG, Chi-Chih PU
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Patent number: 10643980Abstract: A light-emitting device includes a light-emitting element, a supporting structure, a first wavelength conversion structure, and a light-absorbing layer. The light-emitting element includes a plurality of active stacks separated from each other, a first-type semiconductor layer continuously arranged on the plurality of active stacks, and a plurality of second-type semiconductor layers under the plurality of active stacks. The supporting structure is disposed on the light-emitting element and includes a first opening. The first wavelength conversion structure disposed in the first opening. The light-absorbing layer disposed on the top surface of the supporting structure.Type: GrantFiled: January 22, 2019Date of Patent: May 5, 2020Assignee: Epistar CorporationInventors: Min-Hsun Hsieh, Hsin-Mao Liu, Ying-Yang Su
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Publication number: 20190229098Abstract: A light-emitting device includes a light-emitting element, a supporting structure, a first wavelength conversion structure, and a light-absorbing layer. The light-emitting element includes a plurality of active stacks separated from each other, a first-type semiconductor layer continuously arranged on the plurality of active stacks, and a plurality of second-type semiconductor layers under the plurality of active stacks. The supporting structure is disposed on the light-emitting element and includes a first opening. The first wavelength conversion structure disposed in the first opening. The light-absorbing layer disposed on the top surface of the supporting structure.Type: ApplicationFiled: January 22, 2019Publication date: July 25, 2019Inventors: Min-Hsun HSIEH, Hsin-Mao LIU, Ying-Yang SU