Abstract: A package structure includes a thermal dissipation structure including a substrate, a first encapsulant laterally covering the substrate, a die disposed on the substrate and including a sensing region, a second encapsulant laterally covering the die, and a redistribution structure disposed on the die and the second encapsulant. An outer sidewall of the second encapsulant is laterally offset from an outer sidewall of the first encapsulant. The die is electrically coupled to the substrate through the redistribution structure, and the redistribution structure includes a hollow region overlying the sensing region of the die.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a substrate having a first surface and a second surface opposite to the first surface, an optical device disposed on the first surface of the substrate, and an electronic device disposed on the second surface of the substrate. A power of the electronic device is greater than a power of the optical device. A vertical projection of the optical device on the first surface is spaced apart from a vertical projection of the electronic device on the second surface by a distance greater than zero.

Abstract: Provided are a passivation layer for forming a semiconductor bonding structure, a sputtering target making the same, a semiconductor bonding structure and a semiconductor bonding process. The passivation layer is formed on a bonding substrate by sputtering the sputtering target; the passivation layer and the sputtering target comprise a first metal, a second metal or a combination thereof. The bonding substrate comprises a third metal. Based on a total atom number of the surface of the passivation layer, O content of the surface of the passivation layer is less than 30 at %; the third metal content of the surface of the passivation layer is less than or equal to 10 at %. The passivation layer has a polycrystalline structure. The semiconductor bonding structure sequentially comprises a first bonding substrate, a bonding layer and a second bonding substrate: the bonding layer is mainly formed by the passivation layer and the third metal.

Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.

Abstract: A fingerprint identification device and a method for manufacturing the fingerprint identification device are provided. The fingerprint identification device includes a solder ball array, a re-distribution layer, an image sensing integrated circuit (IC), a light emitting circuit, a photic layer and a molding material. The re-distribution layer disposed on the solder ball array is electrically connected to a plurality of solder balls. The image sensing IC includes a plurality of through silicon vias (TSVs), and the TSVs are correspondingly electrically connected to the solder balls, respectively, through the re-distribution layer. The light emitting circuit is disposed on one side of the image sensing IC, and electrically connected to the image sensing IC through the re-distribution layer. The image sensing IC controls the light emitting circuit. The photic layer is disposed on the image sensing IC. The molding material encloses the image sensing IC.

Abstract: A fingerprint identification device and a method for manufacturing the fingerprint identification device are provided. The fingerprint identification device includes a solder ball array, a re-distribution layer, an image sensing integrated circuit (IC), a light emitting circuit, a photic layer and a molding material. The re-distribution layer disposed on the solder ball array is electrically connected to a plurality of solder balls. The image sensing IC includes a plurality of through silicon vias (TSVs), and the TSVs are correspondingly electrically connected to the solder balls, respectively, through the re-distribution layer. The light emitting circuit is disposed on one side of the image sensing IC, and electrically connected to the image sensing IC through the re-distribution layer. The image sensing IC controls the light emitting circuit. The photic layer is disposed on the image sensing IC. The molding material encloses the image sensing IC.

Abstract: A method for taking photo with an extension flash module of a mobile device is provided in the present invention. The mobile device operates in coordination with an extension flash module to achieve fill light while taking photo. The method includes the following steps: detecting a specific event before a flashable period. The flashable period starts from the time at which a last row of photo sensors begins exposure to the time at which a first row of photo sensors ends exposure. The time at which the specific event occurs is a fixed period of time compared to the flashable time. Then, triggering a flash instruction according to a flash delay time and a period from the time at which the specific event occurs to the flashable time, such that the extension flash module flashes during the flashable time.

Abstract: A method for taking photo with an extension flash module of a mobile device is provided in the present invention. The mobile device operates in coordination with an extension flash module to achieve fill light while taking photo. The method includes the following steps: detecting a specific event before a flashable period. The flashable period starts from the time at which a last row of photo sensors begins exposure to the time at which a first row of photo sensors ends exposure. The time at which the specific event occurs is a fixed period of time compared to the flashable time. Then, triggering a flash instruction according to a flash delay time and a period from the time at which the specific event occurs to the flashable time, such that the extension flash module flashes during the flashable time.