Patents by Inventor Ying-Ying Chen
Ying-Ying Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240085369Abstract: Disclosed is a self-powered formaldehyde sensing device, comprising: a triboelectric material electrode layer including a first substrate and a first electrode layer formed on the first substrate; a triboelectric material dielectric layer including a second substrate, a second electrode layer formed on the second substrate, a dielectric reacting layer formed on the second electrode layer, and a reaction modification layer formed on the dielectric reacting layer to surface-modify the dielectric reacting layer, the reaction modification layer being a phosphomolybdic acid complex (cPMA) layer, the phosphomolybdic acid complex of the phosphomolybdic acid complex layer being obtained by dissolving 4,4?-bipyridine (BPY) in isopropanol (IPA) and then mixing with phosphomolybdic acid (PMA) solution; an elastic spacer; and an external circuit.Type: ApplicationFiled: December 21, 2022Publication date: March 14, 2024Applicant: National Taiwan University of Science and TechnologyInventors: Chih-Yu Chang, Chun-Yi Ho, Yu-Hsuan Cheng, Ying-Ying Chen
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Patent number: 11075130Abstract: Semiconductor packages including package substrates having polymer-derived ceramic cores are described. In an example, a package substrate includes a core layer including a polymer-derived ceramic. The polymer-derived ceramic may include filler particles to control shrinkage and reduce warpage of the core layer during fabrication and use of the package substrate. The core layer may include counterbores or blind holes to embed a contact pad or an electrical interconnect in the core layer. A semiconductor die may be mounted on the package substrate and may be electrically connected to the contact pad or the electrical interconnect.Type: GrantFiled: March 30, 2017Date of Patent: July 27, 2021Assignee: Intel CorporationInventors: Lisa Ying Ying Chen, Lauren Ashley Link, Robert Alan May, Amruthavalli Pallavi Alur, Kristof Kuwawi Darmawikarta, Siddharth K. Alur, Sri Ranga Sai Boyapati, Andrew James Brown, Lilia May
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Patent number: 10923028Abstract: A display panel including a substrate, pixel structures, multiple first and second signal lines, signal transfer lines and a sealant pattern is provided. The substrate has a package region, a display region surrounding the package region and a transfer region positioned between the package region and the display region. The pixel structures, the first and second signal lines are disposed in the display region and each pixel structure is electrically connected to one corresponding first and second signal line. The signal transfer lines are disposed in the package region and electrically connected to the first signal lines. The coefficient of thermal expansion of the signal transfer lines is smaller than the first signal lines. The sealant pattern disposed in the package region is overlapped with the signal transfer lines. A display panel including a signal transfer line whose coefficient of thermal expansion is between 4.8(10?6/K) and 14.2(10?6/K) is also provided.Type: GrantFiled: November 10, 2019Date of Patent: February 16, 2021Assignee: Au Optronics CorporationInventors: Yu-Shian Lin, Po-Sheng Liao, Ying-Ying Chen
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Publication number: 20200349886Abstract: A display panel including a substrate, pixel structures, multiple first and second signal lines, signal transfer lines and a sealant pattern is provided. The substrate has a package region, a display region surrounding the package region and a transfer region positioned between the package region and the display region. The pixel structures, the first and second signal lines are disposed in the display region and each pixel structure is electrically connected to one corresponding first and second signal line. The signal transfer lines are disposed in the package region and electrically connected to the first signal lines. The coefficient of thermal expansion of the signal transfer lines is smaller than the first signal lines. The sealant pattern disposed in the package region is overlapped with the signal transfer lines. A display panel including a signal transfer line whose coefficient of thermal expansion is between 4.8 (10?6/K) and 14.2 (10?6/K) is also provided.Type: ApplicationFiled: November 10, 2019Publication date: November 5, 2020Applicant: Au Optronics CorporationInventors: Yu-Shian Lin, Po-Sheng Liao, Ying-Ying Chen
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Publication number: 20190393109Abstract: Semiconductor packages including package substrates having polymer-derived ceramic cores are described. In an example, a package substrate includes a core layer including a polymer-derived ceramic. The polymer-derived ceramic may include filler particles to control shrinkage and reduce warpage of the core layer during fabrication and use of the package substrate. The core layer may include counterbores or blind holes to embed a contact pad or an electrical interconnect in the core layer. A semiconductor die may be mounted on the package substrate and may be electrically connected to the contact pad or the electrical interconnect.Type: ApplicationFiled: March 30, 2017Publication date: December 26, 2019Inventors: Lisa Ying Ying CHEN, Lauren Ashley LINK, Robert Alan MAY, Amruthavalli Pallavi ALUR, Kristof Kuwawi DARMAWIKARTA, Siddharth K. ALUR, Sri Ranga Sai BOYAPATI, Andrew James BROWN, Lilia MAY
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Patent number: 9515490Abstract: A power management method utilizes the steps of reading the driving current; determining if a driving current of an electronic device is less than or equal to a first steady current value for a first period of time; turning off a first electronic module to decrease the driving current when the driving current is less than or equal to the first steady current value for the first period of time; determining if the driving current is within a first judging range for a second period of time; updating the first steady current value with a second steady current value when the driving current is within the first judging range for the second period of time; and determining if the second steady current value is less than or equal to an energy saving set value.Type: GrantFiled: September 3, 2013Date of Patent: December 6, 2016Assignee: PEGATRON CORPORATIONInventor: Ying-Ying Chen
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Patent number: 9240396Abstract: This disclosure provides a pixel structure of inorganic light emitting diode. A first power line is disposed between two adjacent first sub-pixel and second sub-pixel, and the first sub-pixel and second sub-pixel are electrically connected to the same first power line. Also, a first reference line is disposed on an opposite side of the first sub-pixel away from the second sub-pixel, and a second reference line is disposed on an opposite side of the second sub-pixel away from the first sub-pixel. The first sub-pixel and the second sub-pixel have substantially the same length.Type: GrantFiled: May 15, 2014Date of Patent: January 19, 2016Assignee: AU Optronics Corp.Inventors: Chun-Pin Fan, Yu-Sheng Huang, Ying-Ying Chen, Ting-Wei Guo, Kuo-Hsiang Chen
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Publication number: 20150084054Abstract: This disclosure provides a pixel structure of inorganic light emitting diode. A first power line is disposed between two adjacent first sub-pixel and second sub-pixel, and the first sub-pixel and second sub-pixel are electrically connected to the same first power line. Also, a first reference line is disposed on an opposite side of the first sub-pixel away from the second sub-pixel, and a second reference line is disposed on an opposite side of the second sub-pixel away from the first sub-pixel. The first sub-pixel and the second sub-pixel have substantially the same length.Type: ApplicationFiled: May 15, 2014Publication date: March 26, 2015Applicant: AU Optronics Corp.Inventors: Chun-Pin Fan, Yu-Sheng Huang, Ying-Ying Chen, Ting-Wei Guo, Kuo-Hsiang Chen
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Patent number: 8892060Abstract: A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one resistance-capacitance (RC) detection result, wherein the digital compensation filter includes an RC compensation module; and tuning the digital compensation filter by inputting the RC detection result into the RC compensation module. For example, the RC detection result may correspond to a detected value representing a product of a resistance value and a capacitance value. In another example, the at least one RC detection result may be obtained by performing RC detection on at least a portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein. An associated digital compensation filter and an associated calibration circuit are also provided.Type: GrantFiled: November 14, 2011Date of Patent: November 18, 2014Assignee: Mediatek Inc.Inventors: Chi-Hsueh Wang, Chun-Ming Kuo, Ying-Ying Chen, Tai-Yuan Yu
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Publication number: 20140062193Abstract: A power management method includes: reading the driving current; determining if a driving current of an electronic device is less than or equal to a first steady current value for a first period of time; turning off a first electronic module to decrease the driving current when the driving current is less than or equal to the first steady current value for the first period of time; determining if the driving current is within a first judging range for a second period of time; updating the first steady current value with a second steady current value when the driving current is within the first judging range for the second period of time; determining if the second steady current value is less than or equal to an energy saving set value.Type: ApplicationFiled: September 3, 2013Publication date: March 6, 2014Applicant: PEGATRON CORPORATIONInventor: Ying-Ying Chen
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Patent number: 8482498Abstract: A liquid crystal display panel includes a display region, a periphery circuit region, a joint obligate region, a plurality of first test thin-film transistors (TFTs), a plurality of second TFTs, a plurality of first lines, a plurality of second lines, a blank region, and at least one first adjustment TFT. The first and second test TFTs are disposed on the joint obligate region according to a regular distance. Each of the first and second test TFTs has a transistor width. The first adjustment TFT is disposed on the blank region. The width of the blank region is not smaller than the sum of the twice regular distance and the transistor width. Thereby, the present invention can prevent the band mura of the liquid crystal display panel effectively when the liquid crystal display panel is in testing.Type: GrantFiled: August 4, 2009Date of Patent: July 9, 2013Assignee: Au Optronics Corp.Inventors: Shu-Hao Lin, Ying-Ying Chen, Chun-Kai Lai, Chao-Cheng Lin, Yen-Hua Hsu
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Publication number: 20120057653Abstract: A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one resistance-capacitance (RC) detection result, wherein the digital compensation filter includes an RC compensation module; and tuning the digital compensation filter by inputting the RC detection result into the RC compensation module. For example, the RC detection result may correspond to a detected value representing a product of a resistance value and a capacitance value. In another example, the at least one RC detection result may be obtained by performing RC detection on at least a portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein. An associated digital compensation filter and an associated calibration circuit are also provided.Type: ApplicationFiled: November 14, 2011Publication date: March 8, 2012Inventors: Chi-Hsueh Wang, Chun-Ming Kuo, Ying-Ying Chen, Tai-Yuan Yu
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Patent number: 8081936Abstract: A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one loop gain calibration result by performing loop gain calibration based upon signals of at least a portion of the transmitter, and obtaining at least one resistance-capacitance (RC) detection result by performing RC detection on the portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein, wherein the RC detection result corresponds to a detected value representing a product of a resistance value and a capacitance value, and the digital compensation filter includes a gain compensation module and an RC compensation module; and tuning the digital compensation filter by respectively inputting the loop gain calibration result and the RC detection result into the gain compensation module and the RC compensation module. An associated digital compensation filter and an associated calibration circuit are also provided.Type: GrantFiled: November 26, 2009Date of Patent: December 20, 2011Assignee: Mediatek Inc.Inventors: Chi-Hsueh Wang, Chun-Ming Kuo, Ying-Ying Chen, Tai-Yuan Yu
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Patent number: 7924950Abstract: A method of decoding an encoded data frame including dummy bit sequences each generated from encoding a predetermined bit pattern is provided. The method includes: determining a boundary of dummy bit sequences in the encoded data frame; and generating a decoded data frame according to a partial decoding result and a plurality of predetermined bit patterns each corresponding to one of the dummy bit sequences within the boundary, wherein the partial decoding result is generated by decoding encoded bits beyond the boundary according to the predetermined bit pattern.Type: GrantFiled: November 8, 2007Date of Patent: April 12, 2011Assignee: MediaTek Inc.Inventors: Ying-Ying Chen, Chun-Ming Kuo
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Publication number: 20100183091Abstract: A method for tuning a digital compensation filter within a transmitter includes: obtaining at least one loop gain calibration result by performing loop gain calibration based upon signals of at least a portion of the transmitter, and obtaining at least one resistance-capacitance (RC) detection result by performing RC detection on the portion of the transmitter without individually measuring resistance values of resistors therein and capacitance values of capacitors therein, wherein the RC detection result corresponds to a detected value representing a product of a resistance value and a capacitance value, and the digital compensation filter includes a gain compensation module and an RC compensation module; and tuning the digital compensation filter by respectively inputting the loop gain calibration result and the RC detection result into the gain compensation module and the RC compensation module. An associated digital compensation filter and an associated calibration circuit are also provided.Type: ApplicationFiled: November 26, 2009Publication date: July 22, 2010Inventors: Chi-Hsueh Wang, Chun-Ming Kuo, Ying-Ying Chen, Tai-Yuan Yu
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Publication number: 20100117944Abstract: A liquid crystal display panel includes a display region, a periphery circuit region, a joint obligate region, a plurality of first test thin-film transistors (TFTs), a plurality of second TFTs, a plurality of first lines, a plurality of second lines, a blank region, and at least one first adjustment TFT. The first and second test TFTs are disposed on the joint obligate region according to a regular distance. Each of the first and second test TFTs has a transistor width. The first adjustment TFT is disposed on the blank region. The width of the blank region is not smaller than the sum of the twice regular distance and the transistor width. Thereby, the present invention can prevent the band mura of the liquid crystal display panel effectively when the liquid crystal display panel is in testing.Type: ApplicationFiled: August 4, 2009Publication date: May 13, 2010Applicant: AU OPTRONICS CORP.Inventors: Shu-Hao LIN, Ying-Ying CHEN, Chun-Kai LAI, Chao-Cheng LIN, Yen-Hua HSU
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Publication number: 20090122921Abstract: A method of decoding an encoded data frame including dummy bit sequences each generated from encoding a predetermined bit pattern is provided. The method includes: determining a boundary of dummy bit sequences in the encoded data frame; and generating a decoded data frame according to a partial decoding result and a plurality of predetermined bit patterns each corresponding to one of the dummy bit sequences within the boundary, wherein the partial decoding result is generated by decoding encoded bits beyond the boundary according to the predetermined bit pattern.Type: ApplicationFiled: November 8, 2007Publication date: May 14, 2009Inventors: Ying-Ying Chen, Chun-Ming Kuo
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Publication number: 20060198371Abstract: A method for analyzing the reliability of a flag value carried by a current block is disclosed. The method includes: determining whether the current block is a dummy block, and determining the flag value as invalid if the current block is determined as a dummy block. The step of determining the current block is a dummy block can be implemented through two methods. The first method is to utilize information (signal quality indicators) of the current block and a previous block to perform the dummy block determination. The second method is to only utilize information (including the signal quality indicators and coded USF correction indicators) of the current block to generate a determination value through substituting the information into a predetermined equation, and to perform the dummy block detection according to the determination value.Type: ApplicationFiled: December 29, 2005Publication date: September 7, 2006Inventors: Ho-Chi Huang, Chai-Ming Lo, Wei-Nan Sun, Ying-Ying Chen, SHIH-CHUN PENG, Ti-Wen Yuan