Patents by Inventor Ying Yu Tai

Ying Yu Tai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250086329
    Abstract: Methods, systems, and devices for cryptographic key management are described. A memory device can issue, by a firmware component, a command to generate a first cryptographic key for encrypting or decrypting user data stored on a memory device. The memory device can generate, by a hardware component, the first cryptographic key based on the command. The memory device can encrypt, by the hardware component, the first cryptographic key using a second cryptographic key and an initialization vector. The memory device can store the encrypted first cryptographic key in a nonvolatile memory device separate from the hardware component.
    Type: Application
    Filed: November 26, 2024
    Publication date: March 13, 2025
    Inventors: Juane Li, Jiangli Zhu, Ying Yu Tai
  • Publication number: 20250060876
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on memory component reliabilities. The controller can access configuration data to determine a reliability grade associated with individual groups of the memory components. The controller can then adaptively select between different media management operations based on the reliability grade associated with each individual group of the memory components.
    Type: Application
    Filed: October 31, 2024
    Publication date: February 20, 2025
    Inventors: Zhenming Zhou, Ying Yu Tai
  • Publication number: 20250060879
    Abstract: A computing system having a memory component with an embedded media controller. The memory component is encapsulated within an integrated circuit (IC) package. The embedded controller within the IC package is configured to: receive incoming packets, via a serial communication interface of the controller, from a serial connection outside of the IC package; convert the incoming packets into commands and addresses according to a predetermined serial communication protocol; operate memory units encapsulated within the IC package according to the commands and the addresses; convert results of at least a portion of the commands into outgoing packets; and transmit the outgoing packets via the serial communication interface to the serial connection outside of the IC package.
    Type: Application
    Filed: November 1, 2024
    Publication date: February 20, 2025
    Inventors: Samir Mittal, Gurpreet Anand, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 12207451
    Abstract: A power converter is provided. The power converter includes a housing, a heat dissipation module, and a first circuit board. The housing forms a receiving space, wherein the housing includes a first housing port and a second housing port. The heat dissipation module is detachably connected to the housing, and disposed in the receiving space. The heat dissipation module includes an inner path that communicates the first housing port with the second housing port. Working fluid enters the inner path via the first housing port. The working fluid leaves the inner path via the second housing port. The first circuit board includes a first circuit board body and a first heat source, wherein the first heat source is disposed on the first circuit board body, and the first heat source is thermally connected to the inner path of the heat dissipation module.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: January 21, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sheng-Nan Tsai, Ying-Chung Chuang, Chia-Jung Liu, Yi-Wei Chen, Han-Yu Tai, Shao-Hsiang Lo
  • Patent number: 12189960
    Abstract: Embodiments include methods, systems, devices, instructions, and media for limiting hot-cold swap wear leveling in memory devices. In one embodiment, wear metric values are stored and monitored using multiple wear leveling criteria. The multiple wear leveling criteria include a hot-cold swap wear leveling criteria, which may make use of a write count offset value. Based on a first wear metric value of a first management group and a second wear metric value of a second management group, the first management group and the second management group are selected for a wear leveling swap operation. The wear leveling swap operation is performed with a whole management group read operation of the first management group to read a set of data, and a whole management group write operation to write the set of data to the second management group.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: January 7, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Fangfang Zhu, Ying Yu Tai, Ning Chen, Jiangli Zhu, Alex Tang
  • Publication number: 20250004647
    Abstract: A processing device analyzes one or more property and capability characteristics of a plurality of memory devices produced in a development process executed by a memory device development system and identifies respective subsets of the plurality of memory devices having property and capability characteristics that meet respective standards associated with a plurality of different use cases. The processing device further allocates the respective subsets to groups of memory devices corresponding to the different use cases.
    Type: Application
    Filed: May 29, 2024
    Publication date: January 2, 2025
    Inventors: Ying Yu Tai, Jun Wan, Seungjune Jeon, Zhenming Zhou, Jiangli Zhu
  • Patent number: 12182318
    Abstract: Methods, systems, and devices for cryptographic key management are described. A memory device can issue, by a firmware component, a command to generate a first cryptographic key for encrypting or decrypting user data stored on a memory device. The memory device can generate, by a hardware component, the first cryptographic key based on the command. The memory device can encrypt, by the hardware component, the first cryptographic key using a second cryptographic key and an initialization vector. The memory device can store the encrypted first cryptographic key in a nonvolatile memory device separate from the hardware component.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: December 31, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Juane Li, Jiangli Zhu, Ying Yu Tai
  • Patent number: 12164769
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on memory component reliabilities. The controller can access configuration data to determine a reliability grade associated with individual groups of the memory components. The controller can then adaptively select between different media management operations based on the reliability grade associated with each individual group of the memory components.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: December 10, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Zhenming Zhou, Ying Yu Tai
  • Patent number: 12147689
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on temperature-related memory component capabilities. The controller can obtain a write temperature associated with an individual group of memory components. Based on the write temperature and a temperature threshold associated with the individual group of memory components, the controller can select an individual media management operation to perform.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: November 19, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Zhenming Zhou, Ying Yu Tai
  • Patent number: 12135876
    Abstract: A computing system having a memory component with an embedded media controller. The memory component is encapsulated within an integrated circuit (IC) package. The embedded controller within the IC package is configured to: receive incoming packets, via a serial communication interface of the controller, from a serial connection outside of the IC package; convert the incoming packets into commands and addresses according to a predetermined serial communication protocol; operate memory units encapsulated within the IC package according to the commands and the addresses; convert results of at least a portion of the commands into outgoing packets; and transmit the outgoing packets via the serial communication interface to the serial connection outside of the IC package.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: November 5, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Gurpreet Anand, Ying Yu Tai, Cheng Yuan Wu
  • Patent number: 12039196
    Abstract: A processing device in a memory system determines that a number of commands from an active queue that have been executed on a memory device does not satisfy an executed transaction threshold criterion, that a number of pending commands in an inactive queue satisfies a first promotion threshold criterion, and that a number of pending commands in the active queue does not satisfy a second promotion threshold criterion. In response, the processing device switches an execution grant from the active queue to the inactive queue.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: July 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Jiangli Zhu, Wei Wang, Ying Yu Tai, Jason Duong, Chih-Kuo Kao
  • Publication number: 20240111431
    Abstract: A system can include a memory device a memory device comprising multiple dies, and a processing device, operatively coupled with the memory device, to perform various operations including identifying multiple management units to be programmed, where one management unit contains memory cells from a die having one endurance metric and another management unit contains memory cells from a die having another endurance metric, and determining a value of a media endurance metric for each management unit. The operations further include determining, for each management unit, a respective endurance exhaustion parameter defined by a relationship media endurance metrics, and distributing operations to each management unit based on the endurance exhaustion parameter.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Ying Yu Tai, Seungjune Jeon
  • Publication number: 20240104030
    Abstract: A data bus coupled to a plurality of memory devices is determined to be in a read mode. Responsive to determining that the data bus is in the read mode, a particular read operation identified in a particular memory queue of memory queues that include identifiers of one or more write operations and identifiers of one or more read operations is determined. The particular memory queue includes a highest number of read operations for a memory device of the memory devices. The particular read operation is transmitted from the particular memory queue over the data bus.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Samir Mittal
  • Patent number: 11907563
    Abstract: Methods, systems, and devices for one or more clock domain crossing queues are described. A queue can receive, from a first clock domain, a first command to store data in the queue. The queue can store the data at a first location indicated by a first pointer. The queue can receive, from the first clock domain, a second command to cause the second clock domain to retrieve the data from the queue. The queue can generate, based on receiving the second command, a third command synchronized with a clock of the second clock domain and to cause the second clock domain to retrieve the data. The queue can retrieve the data from the first location in the queue indicated by a second pointer associated with retrieving data based at least in part on generating the third command. The queue can transmit, to the second clock domain, the data.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: February 20, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Yueh-Hung Chen, Chih-Kuo Kao, Ying Yu Tai, Jiangli Zhu
  • Patent number: 11874769
    Abstract: A processing device in a memory sub-system maintains a mapping data structure to track data movements from a plurality of data management units associated with a media management operation on a memory device. The processing device further uses a first indicator and a second indicator of a plurality of indicators to indicate which data of data management units of a source group of data management units have been copied to a destination group of data management units during the media management operation. Data located in data management units preceding the first indicator have been copied to data management units of the destination group of data management units. Data located in data management units associated with the first indicator and the second indicator or between the first indicator and the second indicator are either copied to data management units of the destination group of data management units or remain located in data management units of the source group of data management units.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: January 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Ning Chen, Jiangli Zhu, Ying Yu Tai
  • Patent number: 11874779
    Abstract: A data bus is determined to be in a write mode. Whether a number of memory queues that identify at least one write operation satisfies a threshold criterion is determined. The memory queues include identifiers of one or more write operations and identifiers of one or more read operations. Responsive to determining that the number of memory queues satisfies the threshold criterion, a write operation from the memory queues is transmitted over the data bus.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: January 16, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Wei Wang, Jiangli Zhu, Ying Yu Tai, Samir Mittal
  • Patent number: 11869618
    Abstract: A sequencer component residing in a first package receives data from a controller residing in a second package that is different than the first package including the sequencer component. The sequencer component performs an error correction operation on the data received from the controller. The error correction operation encodes the data with additional data to generate a code word. The sequencer component stores the code word at a memory device.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: January 9, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Samir Mittal, Ying Yu Tai, Cheng Yuan Wu, Jiangli Zhu
  • Patent number: 11861167
    Abstract: Methods, systems, and devices for performing an access operation on a memory cell, incrementing a value of a first counter based on performing the access operation on the memory cell, determining that the incremented value of the first counter satisfies a threshold, incrementing a value of a second counter based on determining that the incremented value of the first counter satisfies the threshold, and performing a maintenance operation on the memory cell based on determining that the incremented value of the first counter satisfies the threshold are described.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: January 2, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Ning Chen, Jiangli Zhu, Fangfang Zhu, Ying Yu Tai
  • Publication number: 20230400993
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on temperature-related memory component capabilities. The controller can obtain a write temperature associated with an individual group of memory components. Based on the write temperature and a temperature threshold associated with the individual group of memory components, the controller can select an individual media management operation to perform.
    Type: Application
    Filed: August 3, 2023
    Publication date: December 14, 2023
    Inventors: Zhenming Zhou, Ying Yu Tai
  • Publication number: 20230359356
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to provide adaptive media management based on memory component reliabilities. The controller can access configuration data to determine a reliability grade associated with individual groups of the memory components. The controller can then adaptively select between different media management operations based on the reliability grade associated with each individual group of the memory components.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 9, 2023
    Inventors: Zhenming Zhou, Ying Yu Tai