Abstract: A video-processing chip capable of saving power is disclosed. The video-processing chip includes a microprocessor, a scalar, a first memory, and a second memory. The microprocessor is used for executing program codes. The scalar is used for adjusting a size of a received image. The first memory is coupled to the microprocessor and to the scalar for providing memory space to the scalar for image processing. The second memory is coupled to the microprocessor for storing the program codes of the microprocessor for controlling a power switch. Wherein a size of the first memory is greater than a size of the second memory.

Abstract: A smart card includes a flexible printed circuit board, an electronic paper display panel, a flexible gate driver, a flexible source driver and an integrated circuit. The electronic paper display panel is disposed on the flexible printed circuited board. The flexible gate driver and the flexible source driver are formed by thin film transistors and are disposed on the electronic paper display panel. The integrated circuit is disposed on the flexible printed circuit board for providing control signals to the flexible gate driver and the flexible source driver.

Abstract: The invention discloses a Gamma transform unit. The Gamma transform unit has a lookup table. The lookup table stores a plurality of difference values corresponding to a plurality of predetermined input values. Each of the difference values substantially equals a difference between an ideal output value and a Gamma function output value, both of which correspond to one of the predetermined input values. After the Gamma transform unit has received an input value, it generates a required Gamma function output value corresponding to the received input value through referring to the lookup table.

Abstract: An image processing method for scaling an image from an original resolution to a target resolution is provided. A pixel value PT of a target pixel point NT in the target resolution is theoretically composed of original pixel values P1-PK of original pixel points N1-NK in the original resolution, wherein K is a positive integer larger than 1. First, theoretical combination ratios R1-RK corresponding to the original pixel points N1-NK are found. Then, the theoretical combination ratios R1-RK are converted to corresponding weights W1-WK, wherein each of the corresponding weights W1-WK is an integer between 1 and 2n, n is an integer, and the sum of the corresponding weights W1-WK is 2n. The original pixel values P1-PK are calculated with the corresponding weights W1-WK using a scaler, to generate the pixel value PT of the target pixel point NT and complete the image processing.

Abstract: The invention provides a method and circuitry to save power in a synchronous logic ASIC with low overhead. The scan chain(s) and boundary scan mechanism of the synchronous logic ASIC are used and modified for shifting out current states of internal memory devices of the synchronous logic ASIC to an external memory and for retaining the power-off blocks' primary output values to the memory devices of the boundary scan circuit, so the proposed gated power method is efficient and low overhead in the synchronous, flop-based, logic circuit design.

Abstract: An image processing method for scaling an image from an original resolution to a target resolution is provided. A pixel value PT of a target pixel point NT in the target resolution is theoretically composed of original pixel values P1-PK of original pixel points N1-NK in the original resolution, wherein K is a positive integer larger than 1. First, theoretical combination ratios R1-RK corresponding to the original pixel points N1-NK are found. Then, the theoretical combination ratios R1-RK are converted to corresponding weights W1-WK, wherein each of the corresponding weights W1-WK is an integer between 1 and 2n, n is an integer, and the sum of the corresponding weights W1-WK is 2n. The original pixel values P1-PK are calculated with the corresponding weights W1-WK using a scaler, to generate the pixel value PT of the target pixel point NT and complete the image processing.

Abstract: The invention discloses a Gamma transform unit. The Gamma transform unit has a lookup table. The lookup table stores a plurality of difference values corresponding to a plurality of predetermined input values. Each of the difference values substantially equals a difference between an ideal output value and a Gamma function output value, both of which correspond to one of the predetermined input values. After the Gamma transform unit has received an input value, it generates a required Gamma function output value corresponding to the received input value through referring to the lookup table.

Abstract: A video-processing chip capable of saving power is disclosed. The video-processing chip includes a microprocessor, a scalar, a first memory, and a second memory. The microprocessor is used for executing program codes. The scalar is used for adjusting a size of a received image. The first memory is coupled to the microprocessor and to the scalar for providing memory space to the scalar for image processing. The second memory is coupled to the microprocessor for storing the program codes of the microprocessor for controlling a power switch. Wherein a size of the first memory is greater than a size of the second memory.

Abstract: The invention provides a method to reduce the computation complexity by performing the motion estimation in the frequency domain with tiny hardware overhead and a little modification of the video compression algorithms. Since human eyes are not so sensitive in the high frequency range as in the low frequency range, the present invention only takes low frequency information for finding the motion vector in motion estimation.