Abstract: An interconnect structure between HyperTransport bus interface boards, for interconnecting corresponding HyperTransport bus interfaces disposed on different Printed Circuit Boards (PCBs) via a connector. The connector cuts across a HyperTransport bus, and terminals of two HyperTransport bus interfaces on different PCBs connected via the connector are connected with each other correspondingly via connecting lines sequentially distributed, so as to avoid the intercross of the connecting lines. The present invention may solve the problem of intercrossing of signals on the HyperTransport bus between processors or other chips during inter-board connecting without the increase of PCB layer number or the degradation of signal quality and the additional cost.