Patents by Inventor Yinghan WANG

Yinghan WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11290058
    Abstract: A voltage controlled oscillator (VCO) and buffer circuit includes a voltage controlled oscillator (VCO), a buffer circuit configured to receive a signal generated by the VCO, the buffer circuit comprising a first transistor having a parasitic gate-source capacitance (Cgs), and a second transistor coupled across the first transistor, wherein a gate of the first transistor is coupled to a drain and a source of the second transistor, and a gate of the second transistor is coupled to a source of the first transistor.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: March 29, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Yue Chao, Yinghan Wang, Marco Zanuso, Rajagopalan Rangarajan
  • Publication number: 20210044253
    Abstract: A voltage controlled oscillator (VCO) and buffer circuit includes a voltage controlled oscillator (VCO), a buffer circuit configured to receive a signal generated by the VCO, the buffer circuit comprising a first transistor having a parasitic gate-source capacitance (Cgs), and a second transistor coupled across the first transistor, wherein a gate of the first transistor is coupled to a drain and a source of the second transistor, and a gate of the second transistor is coupled to a source of the first transistor.
    Type: Application
    Filed: October 22, 2020
    Publication date: February 11, 2021
    Inventors: Yue CHAO, Yinghan WANG, Marco ZANUSO, Rajagopalan RANGARAJAN
  • Patent number: 10848100
    Abstract: A voltage controlled oscillator (VCO) and buffer circuit includes a voltage controlled oscillator (VCO), a buffer circuit configured to receive a signal generated by the VCO, the buffer circuit comprising a first transistor having a parasitic gate-source capacitance (Cgs), and a second transistor coupled across the first transistor, wherein a gate of the first transistor is coupled to a drain and a source of the second transistor, and a gate of the second transistor is coupled to a source of the first transistor.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: November 24, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Yue Chao, Yinghan Wang, Marco Zanuso, Rajagopalan Rangarajan
  • Publication number: 20200091866
    Abstract: A voltage controlled oscillator (VCO) and buffer circuit includes a voltage controlled oscillator (VCO), a buffer circuit configured to receive a signal generated by the VCO, the buffer circuit comprising a first transistor having a parasitic gate-source capacitance (Cgs), and a second transistor coupled across the first transistor, wherein a gate of the first transistor is coupled to a drain and a source of the second transistor, and a gate of the second transistor is coupled to a source of the first transistor.
    Type: Application
    Filed: September 17, 2018
    Publication date: March 19, 2020
    Inventors: Yue CHAO, Yinghan WANG, Marco ZANUSO, Rajagopalan RANGARAJAN