Abstract: According to one embodiment, a pattern formation device that presses a template that includes a concave and convex part onto a transferring object and that forms a pattern in which a shape of the concave and convex part is transferred is provided. The device includes: a calculation part; an adjustment part; and a transfer. The calculation part calculates, using design information of the pattern, the distribution of force applied to the pattern at a time of releasing the template pressed onto the transferring object from the transferring object. The adjustment part adjusts forming conditions of the pattern in order to uniformly approach the distribution of force calculated by the calculation part. The transfer part transfers the shape of the concave and convex part to the transferring object according to the forming conditions adjusted by the adjustment part.

Abstract: According to one embodiment, a mask pattern creation method includes extracting an area, in which a DSA material is directed self-assembled to form a DSA pattern, from a design pattern area based on a design pattern and information on the DSA material. The method also includes creating a guide pattern that causes the DSA pattern to be formed in the area based on the design pattern, the information on the DSA material, the area, and a design constraint when forming the guide pattern. The method further includes creating a mask pattern of the guide pattern using the guide pattern.

Abstract: According to one embodiment, a nonvolatile memory device includes a substrate, first and second tunnel insulating films, first and second floating gate electrodes, an intergate insulating film and a control gate electrode. The substrate has first and second active regions isolated from each other by an element isolation trench. The first and second tunnel insulating films are located in the first and second active regions, respectively. The first and second floating gate electrodes are located on the first and second tunnel insulating films, respectively. The intergate insulating film includes a first insulating layer of a first insulating material, an electron trap layer of a second insulating material on the first insulating layer, and a second insulating layer of the first insulating material on the electron trap layer. The control gate electrode is located on the intergate insulating film.

Abstract: According to one embodiment, a mask pattern creation method includes extracting an area, in which a DSA material is directed self-assembled to form a DSA pattern, from a design pattern area based on a design pattern and information on the DSA material. The method also includes creating a guide pattern that causes the DSA pattern to be formed in the area based on the design pattern, the information on the DSA material, the area, and a design constraint when forming the guide pattern. The method further includes creating a mask pattern of the guide pattern using the guide pattern.

Abstract: According to one embodiment, a pattern formation device that presses a template that includes a concave and convex part onto a transferring object and that forms a pattern in which a shape of the concave and convex part is transferred is provided. The device includes: a calculation part; an adjustment part; and a transfer. The calculation part calculates, using design information of the pattern, the distribution of force applied to the pattern at a time of releasing the template pressed onto the transferring object from the transferring object. The adjustment part adjusts forming conditions of the pattern in order to uniformly approach the distribution of force calculated by the calculation part. The transfer part transfers the shape of the concave and convex part to the transferring object according to the forming conditions adjusted by the adjustment part.

Abstract: According to one embodiment, a pattern formation method includes: providing a first member; providing a second member; forming a third pattern; and removing a convex portion of a second pattern. The first member is provided on a major surface of a substrate and cured in a state of a template having a first pattern being brought into contact to form the second pattern including a convex portion in a first region on the major surface. The second member is provided in a concave portion adjacent to the convex portion of the second pattern. The third pattern is formed in the second member provided on a second region on the major surface. The removing the convex portion includes removing the convex portion of the second pattern to leave the third pattern and a fourth pattern formed by the second member provided in the concave portion on the major surface.

Abstract: According to one embodiment, a template includes: a base substrate; and a pattern portion provided on the base substrate and including a concave-convex pattern formed from a master pattern. The concave-convex pattern is provided in a distorted state with respect to the master pattern in accordance with a distortion of an underlying pattern formed on a substrate to which a shape of the concave-convex pattern is to be transferred.

Abstract: According to one embodiment, a resin removal method is provided. In the resin removal method, near-field light is generated in a local area of a pattern concave-convex portion on a pattern master used for imprinting by irradiating the pattern master with ultraviolet light in an ashing gas atmosphere which removes resin attached to the pattern master. Then, the resin is removed from the pattern master by using the ashing gas and the near-field light.

Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a first isolation groove penetrating through a conductive film serving as the gate electrode to reach the semiconductor substrate. The method can include forming a protection film covering a side wall of the first isolation groove including a side face of the gate electrode. The method can include forming a second isolation groove by etching the semiconductor substrate exposed to a bottom surface of the first isolation groove. The method can include oxidizing an inner surface of the second isolation groove provided on each of both sides of the gate electrode to form first insulating films, which are connected to each other under the gate electrode.

Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided via a gate insulating film above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a protection film covering the side face of the gate electrode. The method can include etching the semiconductor substrate using the gate electrode as a mask to form the isolation groove. The side face of the gate electrode is covered with the protection film. The method can include forming a first insulating film by oxidizing a surface of the isolation groove to fill a bottom portion of the isolation groove. In addition, the method can include forming a second insulating film on the first insulating film to fill an upper portion of the isolation groove including the side face of the gate electrode.

Abstract: According to one embodiment, a nonvolatile memory device includes a substrate, first and second tunnel insulating films, first and second floating gate electrodes, an intergate insulating film and a control gate electrode. The substrate has first and second active regions isolated from each other by an element isolation trench. The first and second tunnel insulating films are located in the first and second active regions, respectively. The first and second floating gate electrodes are located on the first and second tunnel insulating films, respectively. The intergate insulating film includes a first insulating layer of a first insulating material, an electron trap layer of a second insulating material on the first insulating layer, and a second insulating layer of the first insulating material on the electron trap layer. The control gate electrode is located on the intergate insulating film.

Abstract: According to one embodiment, a pattern formation method is disclosed. The method can include filling an imprint material between a first protrusion-depression pattern of a first pattern transfer layer formed on a first replica substrate and a second pattern transfer layer being transparent to energy radiation and formed on a second replica substrate transparent to the energy radiation. The method can include curing the imprint material by irradiating the imprint material with the energy radiation from an opposite surface side of the second replica substrate. The method can include releasing the first protrusion-depression pattern from the imprint material. The method can include forming a second protrusion-depression pattern in the second pattern transfer layer by processing the second pattern transfer layer using the imprint material as a mask.