Patents by Inventor Yinglai XI

Yinglai XI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210136340
    Abstract: A color temperature adjustment method includes obtaining an image to be adjusted, determining a pixel value gain of a pixel in the image according to a pixel value of the pixel and a preset gain-value correspondence between the pixel value and the pixel value gain, and adjusting a color temperature of the pixel according to the pixel value and the pixel value gain of the pixel, and a color temperature adjustment ratio.
    Type: Application
    Filed: January 13, 2021
    Publication date: May 6, 2021
    Inventor: Yinglai XI
  • Patent number: 10469868
    Abstract: An in-loop filtering acceleration circuit applied in a video codec system supporting the H.264 standard and the VC-1 standard is provided. The circuit includes multiple one-dimensional (1D) filters configured to perform a filtering process; and a filter selection unit configured to select one of the 1D filters according to the value of the boundary strength to perform the filtering processing to the reconstructed macroblock. The in-loop filtering acceleration circuit further divides the reconstructed macroblock into multiple 8×8 blocks and multiple 4×4 blocks, performs the filtering process to horizontal edges of the 8×8 blocks the reconstructed macroblock row by row from bottom to top, and performs the filtering process to horizontal edges of the 4×4 blocks row by row from top to bottom.
    Type: Grant
    Filed: August 5, 2015
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Yinglai Xi, Qiang Li, Jumei Li, Jianbin He, Jinfeng Zhou, Zhichong Chen, Liu Yang, Dong Li
  • Patent number: 9918079
    Abstract: An electronic device for motion compensation is provided. The electronic device has a processing unit configured to perform a decoding program on a video bitstream to output decoding data, wherein the decoding data has a plurality of inter-prediction macroblocks, and the processing unit further generates a plurality of first pixel interpolation values according to the inter-prediction macroblocks which are smaller than a predetermined macroblock size. A motion compensation acceleration circuit is configured to generate a plurality of second pixel interpolation values according to the inter-prediction macroblocks which are larger than or equal to the predetermined macroblocks size, and generate a plurality of reconstructed macroblocks according to the first pixel interpolation values, the second pixel interpolation values, and a plurality of corresponding residue values.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: March 13, 2018
    Assignee: Intel Corporation
    Inventors: Yinglai Xi, Qiang Li, Zhichong Chen, Jumei Li
  • Patent number: 9918088
    Abstract: A transform and inverse transform circuit is provided. The transform and inverse transform circuit includes: at least one quantization and inverse quantization circuit, including at least one quantization and inverse quantization unit, wherein each quantization and inverse quantization unit includes a plurality of first coefficients, and each quantization and inverse quantization unit performs quantization or inverse quantization on one of multiple ways of inputting data; and at least one one-dimensional transform circuit, coupled to the quantization and inverse quantization circuit, wherein the one-dimensional transform circuit includes a plurality of second coefficients, wherein the one-dimensional transform circuit performs one-dimensional transform on the inputting data processed by the quantization and inverse quantization circuit, wherein the plurality of first coefficients and the plurality of second coefficients are set up based on a video codec standard.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: March 13, 2018
    Assignee: Intel Corporation
    Inventors: Qiang Li, Jumei Li, Yinglai Xi, Fei Su
  • Publication number: 20150341658
    Abstract: An in-loop filtering acceleration circuit applied in a video codec system supporting the H.264 standard and the VC-1 standard is provided. The circuit includes multiple one-dimensional (1D) filters configured to perform a filtering process; and a filter selection unit configured to select one of the 1D filters according to the value of the boundary strength to perform the filtering processing to the reconstructed macroblock. The in-loop filtering acceleration circuit further divides the reconstructed macroblock into multiple 8×8 blocks and multiple 4×4 blocks, performs the filtering process to horizontal edges of the 8×8 blocks the reconstructed macroblock row by row from bottom to top, and performs the filtering process to horizontal edges of the 4×4 blocks row by row from top to bottom.
    Type: Application
    Filed: August 5, 2015
    Publication date: November 26, 2015
    Inventors: Yinglai XI, Qiang LI, Jumei LI, Jianbin HE, Jinfeng ZHOU, Zhichong CHEN, Liu YANG, Dong LI
  • Publication number: 20150195522
    Abstract: A transform and inverse transform circuit is provided. The transform and inverse transform circuit includes: at least one quantization and inverse quantization circuit, including at least one quantization and inverse quantization unit, wherein each quantization and inverse quantization unit includes a plurality of first coefficients, and each quantization and inverse quantization unit performs quantization or inverse quantization on one of multiple ways of inputting data; and at least one one-dimensional transform circuit, coupled to the quantization and inverse quantization circuit, wherein the one-dimensional transform circuit includes a plurality of second coefficients, wherein the one-dimensional transform circuit performs one-dimensional transform on the inputting data processed by the quantization and inverse quantization circuit, wherein the plurality of first coefficients and the plurality of second coefficients are set up based on a video codec standard.
    Type: Application
    Filed: August 13, 2014
    Publication date: July 9, 2015
    Inventors: Qiang LI, Jumei LI, Yinglai XI, Fei SU
  • Publication number: 20130301701
    Abstract: An electronic device for motion compensation is provided. The electronic device has a processing unit configured to perform a decoding program on a video bitstream to output decoding data, wherein the decoding data has a plurality of inter-prediction macroblocks, and the processing unit further generates a plurality of first pixel interpolation values according to the inter-prediction macroblocks which are smaller than a predetermined macroblock size. A motion compensation acceleration circuit is configured to generate a plurality of second pixel interpolation values according to the inter-prediction macroblocks which are larger than or equal to the predetermined macroblocks size, and generate a plurality of reconstructed macroblocks according to the first pixel interpolation values, the second pixel interpolation values, and a plurality of corresponding residue values.
    Type: Application
    Filed: May 7, 2013
    Publication date: November 14, 2013
    Applicant: VIA Telecom, Inc.
    Inventors: Yinglai XI, Qiang LI, Zhichong CHEN, Jumei LI