Abstract: Methods, devices, and systems of the invention provide improved semiconductor device testing with firm tester-to-device interface and increased contact area. A test probe (24, 58) associated with ATE (18) is configured to substantially correspond to a probe receptacle (38) of a test board (16) or semiconductor device (10). Upon insertion of the test probe (24, 58) into the probe receptacle (38), areas of staunch electrical contact (34) between the probe receptacle (38) and probe (24, 58) facilitate measuring an electrical signal.

Abstract: A method of making an integrated circuit capacitor and/or resistor and the capacitor and/or resistor wherein the method comprises providing an electrically conductive region, preferably highly doped silicon, forming a first electrode of a capacitor, forming a layer of electrically insulating material, preferably silicon oxide, silicon nitride or a combination thereof, over the surface and forming a layer of a metal silicide, preferably titanium silicide, over the layer of electrically insulating material by forming a layer of polysilicon over the layer of electrically insulating material, forming a layer of a metal, preferably titanium, which forms an electrically conductive composition when reacted with polysilicon over the layer of polysilicon, reacting the metal with the polysilicon to form an electrically conductive layer therewith and removing any unreacted metal.

Abstract: A method of making an integrated circuit containing a capacitor comprising the steps of providing a semiconductor substrate having an active region and an oxide region on the substrate defining the active region, forming a mask on the active region, forming a region of heavily doped polysilicon on the oxide region having a doping level of from about 10 to about 15 ohms/square, removing the mask from the active region, commencing fabrication of an active device in the active region, forming a layer of electrically insulating material over the region of heavily doped polysilicon and a layer of electrically insulating material over the active region, forming a layer of heavily doped polysilicon having a doping level of from about 10 to about 15 ohms/square on the electrically insulating material to complete fabrication of the capacitor and on the active region and completing fabrication of an active device in the active region.

Abstract: An antifuse (42) is formed by forming a layer of titanium tungsten (34) overlying a portion of a first metal layer (28). The titanium tungsten layer (34) is oxidized to form a film of oxide (36) on its surface. Insulating regions (30) are formed adjacent the titanium tungsten layer (34) and overlying the first metal layer (28). A second metal layer (40) is formed overlying the titanium tungsten layer (34). Applying a break down voltage across the first and second metal layers (28), (40) will break down the oxide film (36), thereby causing a connection between the first and second metal layers (28), (40).

Abstract: An antifuse (42) is formed by forming a layer of titanium tungsten (34) overlying a portion of a first metal layer (28). The titanium tungsten layer (34) is oxidized to form a film of oxide (36) on its surface. Insulating regions (30) are formed adjacent the titanium tungsten layer (34) and overlying the first metal layer (28). A second metal layer (40) is formed overlying the titanium tungsten layer (34). Applying a break down voltage across the first and second metal layers (28), (40) will break down the oxide film (36), thereby causing a connection between the first and second metal layers (28), (40).

Abstract: A novel process for fabricating a CCD imager arrray (10) having a tin oxide electrode monolayer (18) is disclosed. The process includes a low pressure chemical vapor deposition step using tetramethyltin and oxygen, and an ion implantation step that increased conductivity of the tin oxide electrodes to as high as 700 ohm.sup.-1 cm.sup.-1.