Patents by Inventor Yinji JIN

Yinji JIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240163428
    Abstract: Provided are a video decoding method and a video decoding device, which, during video encoding and decoding processes, obtain most probable mode (MPM) information indicating whether to use MPMs of a current block determined based on at least two of a prediction mode of a left neighboring block adjacent to a left side of the current block, a prediction mode of an upper neighboring block adjacent to an upper side of the current block, and a right neighboring block adjacent to a right side of the current block, obtain extended intra mode set information indicating whether to use an extended intra mode set configured based on the MPMs, and determine an intra prediction mode of the current block based on the MPM information and the extended intra mode set information.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Narae CHOI, Bora Jin, Yinji Piao, Minwoo Park
  • Patent number: 11917140
    Abstract: Provided are a video decoding method and a video decoding device, which, during video encoding and decoding processes, obtain most probable mode (MPM) information indicating whether to use MPMs of a current block determined based on at least two of a prediction mode of a left neighboring block adjacent to a left side of the current block, a prediction mode of an upper neighboring block adjacent to an upper side of the current block, and a right neighboring block adjacent to a right side of the current block, obtain extended intra mode set information indicating whether to use an extended intra mode set configured based on the MPMs, and determine an intra prediction mode of the current block based on the MPM information and the extended intra mode set information.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: February 27, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Narae Choi, Bora Jin, Yinji Piao, Minwoo Park
  • Publication number: 20210318703
    Abstract: A low dropout voltage regulator comprises an error amplifying circuit, an output stage circuit and a load unit. The error amplifying circuit receives a reference voltage signal and a feedback voltage signal, and amplifies the voltage difference between the reference voltage signal and the feedback voltage signal to generate an amplified voltage signal. The output stage circuit couples to the error amplifying circuit, and receives the amplified voltage signal, generate an output voltage signal according to the amplified voltage signal, and generates a feedback voltage signal according to the output voltage signal. The load unit couples to the output stage circuit and receives the output voltage signal.
    Type: Application
    Filed: July 8, 2020
    Publication date: October 14, 2021
    Inventor: Yinji JIN