Patents by Inventor Yipei Yu
Yipei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12086062Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number.Type: GrantFiled: October 9, 2023Date of Patent: September 10, 2024Assignee: Micron Technology, Inc.Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
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Publication number: 20240037033Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number.Type: ApplicationFiled: October 9, 2023Publication date: February 1, 2024Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
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Patent number: 11782831Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can, in response to a parameter of journal buffer of a volatile memory device satisfying a threshold criterion, save at least one journal of updates of the L2P table to the non-volatile memory device. It can also retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number, in response to detecting a power loss event.Type: GrantFiled: September 1, 2021Date of Patent: October 10, 2023Assignee: Micron Technology, Inc.Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
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Patent number: 11768631Abstract: A system for file system data access can include memory devices including a non-volatile memory device, as well as a processing device, operatively coupled with the memory devices to perform operations including receiving a file system (FS) write command and determining whether a write count of a physical super management unit (PSMU) of the non-volatile memory device satisfies a threshold criterion. The operations can include, recording a change of a super management unit (SMU) mapping for FS data of an FS mapping table, where the FS mapping table is a portion of a logical-to-physical (L2P) mapping table and performing a move of SMU data corresponding to the change of the SMU mapping. They can also include creating a backup copy of the FS mapping table on the non-volatile memory device, and restoring the FS mapping table from the backup copy of the FS mapping table.Type: GrantFiled: August 31, 2021Date of Patent: September 26, 2023Assignee: Micron Technology, Inc.Inventors: Huapeng G. Guan, Ximin Shan, Yipei Yu, Wei Wang
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Patent number: 11714722Abstract: An example memory sub-system includes one or more memory devices and a processing device, operatively coupled to the one or more memory devices.Type: GrantFiled: September 27, 2021Date of Patent: August 1, 2023Assignee: Micron Technology, Inc.Inventors: Yipei Yu, Wei Wang, Jiangli Zhu, Huapeng Guan
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Publication number: 20230062949Abstract: A system for file system data access can include memory devices including a non-volatile memory device, as well as a processing device, operatively coupled with the memory devices to perform operations including receiving a file system (FS) write command and determining whether a write count of a physical super management unit (PSMU) of the non-volatile memory device satisfies a threshold criterion. The operations can include, recording a change of a super management unit (SMU) mapping for FS data of an FS mapping table, where the FS mapping table is a portion of a logical-to-physical (L2P) mapping table and performing a move of SMU data corresponding to the change of the SMU mapping. They can also include creating a backup copy of the FS mapping table on the non-volatile memory device, and restoring the FS mapping table from the backup copy of the FS mapping table.Type: ApplicationFiled: August 31, 2021Publication date: March 2, 2023Inventors: Huapeng G. Guan, Ximin Shan, Yipei Yu, Wei Wang
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Publication number: 20230065617Abstract: A system for managing power loss can include a number of memory devices including a volatile memory device and a non-volatile memory device and a processing device operatively coupled with the plurality of memory devices. The processor can save a snapshot of a logical-to-physical (L2P) table to a non-volatile memory device and maintain a journal of updates of the L2P. The processor can, in response to a parameter of journal buffer of a volatile memory device satisfying a threshold criterion, save at least one journal of updates of the L2P table to the non-volatile memory device. It can also retrieve a sequence number from system metadata and save the most recent set of updates of the L2P table to a dedicated area of the non-volatile memory device, where the dedicated area is identified by the sequence number, in response to detecting a power loss event.Type: ApplicationFiled: September 1, 2021Publication date: March 2, 2023Inventors: Huapeng G. Guan, Frederick Adi, Jiangli Zhu, Yipei Yu, Venkata Naga Lakshman Pasala, Wei Wang
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Publication number: 20220100608Abstract: An example memory sub-system includes one or more memory devices and a processing device, operatively coupled to the one or more memory devices.Type: ApplicationFiled: September 27, 2021Publication date: March 31, 2022Inventors: Yipei Yu, Wei Wang, Jiangli Zhu, Huapeng Guan
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Patent number: 9753649Abstract: Systems, methods and/or devices are used to enable tracking intermix of writes and un-map commands across power cycles. In one aspect, the method includes (1) receiving, at a storage device, a plurality of commands from a host, the storage device including non-volatile memory, (2) maintaining a log corresponding to write commands and un-map commands from the host, (3) maintaining a mapping table in volatile memory, the mapping table used to translate logical addresses to physical addresses, (4) saving the mapping table, on a scheduled basis that is independent of the un-map commands, to the non-volatile memory of the storage device, (5) saving the log to the non-volatile memory, and (6) upon power up of the storage device, rebuilding the mapping table from the saved mapping table in the non-volatile memory of the storage device and from the saved log in the non-volatile memory of the storage device.Type: GrantFiled: March 16, 2015Date of Patent: September 5, 2017Assignee: SanDisk Technologies LLCInventors: Douglas A. Prins, Aaron K. Olbrich, Huapeng Guan, Graeme Weston-Lewis, Anand Kulkarni, Yipei Yu
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Publication number: 20160117099Abstract: Systems, methods and/or devices are used to enable tracking intermix of writes and un-map commands across power cycles. In one aspect, the method includes (1) receiving, at a storage device, a plurality of commands from a host, the storage device including non-volatile memory, (2) maintaining a log corresponding to write commands and un-map commands from the host, (3) maintaining a mapping table in volatile memory, the mapping table used to translate logical addresses to physical addresses, (4) saving the mapping table, on a scheduled basis that is independent of the un-map commands, to the non-volatile memory of the storage device, (5) saving the log to the non-volatile memory, and (6) upon power up of the storage device, rebuilding the mapping table from the saved mapping table in the non-volatile memory of the storage device and from the saved log in the non-volatile memory of the storage device.Type: ApplicationFiled: March 16, 2015Publication date: April 28, 2016Inventors: Douglas A. Prins, Aaron K. Olbrich, Huapeng Guan, Graeme Weston-Lewis, Anand Kulkarni, Yipei Yu