Abstract: Methods, systems, and non-transitory computer readable media for advanced power management for serial advanced technology attachment (SATA)-based storage devices are disclosed. According to one aspect, the subject matter described herein includes a method for advanced power management of SATA-based storage devices. The method includes, at a SATA-based storage device having a controller, a non-volatile memory for storing data, and a communication interface for communicating with a host, receiving from the host a command to enter a quiescent mode. In response to receiving the command to enter a quiescent mode, the storage device enters a quiescent mode. The storage device receives from the host an indication that the storage device should enter a low power mode. In response to this indication, the storage device puts at least a portion of the non-volatile memory into a low power mode while maintaining at least a portion of the controller in normal power mode.

Abstract: Methods, systems, and non-transitory computer readable media for advanced power management for serial advanced technology attachment (SATA)-based storage devices are disclosed. According to one aspect, the subject matter described herein includes a method for advanced power management of SATA-based storage devices. The method includes, at a SATA-based storage device having a controller, a non-volatile memory for storing data, and a communication interface for communicating with a host, receiving from the host a command to enter a quiescent mode. In response to receiving the command to enter a quiescent mode, the storage device enters a quiescent mode. The storage device receives from the host an indication that the storage device should enter a low power mode. In response to this indication, the storage device puts at least a portion of the non-volatile memory into a low power mode while maintaining at least a portion of the controller in normal power mode.

Abstract: A transmissive active channel element is provided in each signal channel of a monolithic multi-channel TxPIC where each channel also includes a modulated source. The active channel element functions both as a power control element for both monitoring and regulating the output channel signal level of each signal channel and as a modulator for channel wavelength tagging or labeling to provide for wavelength locking the modulated sources. The power regulating function is also employed to control the channel signal power outputs of each channel to be uniform across the channel signal array. All of these functions are carried out by a feedback loop utilizing digital signal processing.

Abstract: A portable memory storage device is disclosed where access to information on the device is granted only upon proper biometric authentication of a user. The device includes a controller, a non-volatile memory which may be a flash memory, and a biometric scanner system for controlling access to the information within the non-volatile memory. Each of the controller, non-volatile memory and biometric scanner system may be mounted in a base of the portable device, with the biometric system having an exposed surface on a top portion of the base for accepting biometric data such as a fingerprint. A cover is provided which includes a USB connector capable of mating within a USB port of the host device to establish communications between the portable and host devices. The cover also covers the exposed portion of the biometric scanner to protect the sensor when the portable memory storage device is not in use.

Abstract: A transmissive active channel element is provided in each signal channel of a monolithic multi-channel TxPIC where each channel also includes a modulated source. The active channel element functions both as a power control element for both monitoring and regulating the output channel signal level of each signal channel and as a modulator for channel wavelength tagging or labeling to provide for wavelength locking the modulated sources. The power regulating function is also employed to control the channel signal power outputs of each channel to be uniform across the channel signal array. All of these functions are carried out by a feedback loop utilizing digital signal processing.

Abstract: A voltage regulation circuit in a nonvolatile memory card accepts an input voltage from a host at two or more different voltage levels and provides an output voltage at a single level to components including a memory die. The voltage regulation circuit can provide an output voltage that is higher or lower than the input voltage.

Abstract: A voltage regulation circuit in a nonvolatile memory card accepts an input voltage from a host at two or more different voltage levels and provides an output voltage at a single level to components including a memory die. The voltage regulation circuit can provide an output voltage that is higher or lower than the input voltage.

Abstract: A transmissive active channel element is provided in each signal channel of a monolithic multi-channel TxPIC where each channel also includes a modulated source. The active channel element functions both as a power control element for both monitoring and regulating the output channel signal level of each signal channel and as a modulator for channel wavelength tagging or labeling to provide for wavelength locking the modulated sources. The power regulating function is also employed to control the channel signal power outputs of each channel to be uniform across the channel signal array. All of these functions are carried out by a feedback loop utilizing digital signal processing.

Abstract: A flash memory system includes a flash memory device and a controller, operable according to an advanced data transfer mode. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe at a higher frequency, for example at twice the frequency, of that available in the normal mode. In the advanced mode, the input data is presented by the controller synchronously with a higher frequency write data strobe than is available in the normal mode. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe at a higher frequency, for example at twice the frequency, of that available in the normal mode. In the advanced mode, the input data is presented by the controller synchronously with a higher frequency write data strobe than is available in the normal mode. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe, and presents data synchronously with both the falling and rising edges of that read data strobe. In the advanced mode, the input data is presented by the controller synchronously with both edges of the write data strobe. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A voltage regulation circuit in a nonvolatile memory card accepts an input voltage from a host at two or more different voltage levels and provides an output voltage at a single level to components including a memory die. The voltage regulation circuit can provide an output voltage that is higher or lower than the input voltage.

Abstract: A voltage regulation circuit in a nonvolatile memory card accepts an input voltage from a host at two or more different voltage levels and provides an output voltage at a single level to components including a memory die. The voltage regulation circuit can provide an output voltage that is higher or lower than the input voltage.

Abstract: A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe, and presents data synchronously with both the falling and rising edges of that read data strobe. In the advanced mode, the input data is presented by the controller synchronously with both edges of the write data strobe. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe, and presents data synchronously with both the falling and rising edges of that read data strobe. In the advanced mode, the input data is presented by the controller synchronously with both edges of the write data strobe. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe at a higher frequency, for example at twice the frequency, of that available in the normal mode. In the advanced mode, the input data is presented by the controller synchronously with a higher frequency write data strobe than is available in the normal mode. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe at a higher frequency, for example at twice the frequency, of that available in the normal mode. In the advanced mode, the input data is presented by the controller synchronously with a higher frequency write data strobe than is available in the normal mode. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A flash memory system including a flash memory device and a controller, operable according to an advanced data transfer mode is disclosed. The flash memory device is operable both in a “legacy” mode, in which read data is presented by the memory synchronously with each cycle of a read data strobe from the controller, and in which input data is latched by the memory synchronously with each cycle of a write data strobe from the controller. In the advanced mode, which can be initiated by the controller forwarding an initiation command to the memory, the flash memory itself sources the read data strobe, and presents data synchronously with both the falling and rising edges of that read data strobe. In the advanced mode, the input data is presented by the controller synchronously with both edges of the write data strobe. The voltage swing of the data and control signals is reduced from conventional standards, to reduce power consumption.

Abstract: A transmissive active channel element is provided in each signal channel of a monolithic multi-channel TxPIC where each channel also includes a modulated source. The active channel element functions both as a power control element for both monitoring and regulating the output channel signal level of each signal channel and as a modulator for channel wavelength tagging or labeling to provide for wavelength locking the modulated sources. The power regulating function is also employed to control the channel signal power outputs of each channel to be uniform across the channel signal array. All of these functions are carried out by a feedback loop utilizing digital signal processing.

Abstract: A portable memory storage device is disclosed where access to information on the device is granted only upon proper biometric authentication of a user. The device includes a controller, a non-volatile memory which may be a flash memory, and a biometric scanner system for controlling access to the information within the non-volatile memory. Each of the controller, non-volatile memory and biometric scanner system may be mounted in a base of the portable device, with the biometric system having an exposed surface on a top portion of the base for accepting biometric data such as a fingerprint. A cover is provided which includes a USB connector capable of mating within a USB port of the host device to establish communications between the portable and host devices. The cover also covers the exposed portion of the biometric scanner to protect the sensor when the portable memory storage device is not in use.