Patents by Inventor Yi-Ting Liao
Yi-Ting Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12211790Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first vertical structure and a second vertical structure formed over the substrate, and a conductive rail structure between the first and second vertical structures. A top surface of the conductive rail structure can be substantially coplanar with top surfaces of the first and the second vertical structures.Type: GrantFiled: August 10, 2023Date of Patent: January 28, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yi-Bo Liao, Wei Ju Lee, Cheng-Ting Chung, Hou-Yu Chen, Chun-Fu Cheng, Kuan-Lun Cheng
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Publication number: 20230335603Abstract: The present disclosure describes a semiconductor structure with a metal ion capture layer and a method for forming the structure. The method includes forming a first fin structure and a second fin structure on a substrate and forming a first gate structure over the first fin structure and a second gate structure over the second fin structure, where the first gate structure adjoins the second gate structure. The method further includes forming a dielectric layer on the first and second gate structures, removing a portion of the dielectric layer above an adjoining portion of the first and second gate structures to form an opening, and forming a metal ion capture layer in the opening.Type: ApplicationFiled: April 14, 2022Publication date: October 19, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yi Ting Liao, Chao-Chi Chen, Bo-Wei Chen, Shi Sheng Hu, Shun Chi TSAI
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Patent number: 10290710Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a first gradient layer, two source/drain structures, a second gradient layer, and a gate. The first gradient layer is disposed on the substrate. The two source/drain structures are separately disposed on the first gradient layer. The second gradient layer is disposed on the two source/drain structures and the first gradient layer, and a second portion of the second gradient layer directly contacts a first portion of the first gradient layer. The gate is disposed on the second gradient layer, between the two source/drain structures.Type: GrantFiled: September 5, 2017Date of Patent: May 14, 2019Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuo-Chih Lai, Ming-Chang Lu, Wei Chen, Hui-Lin Wang, Yi-Ting Liao, Chin-Fu Lin
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Publication number: 20190074357Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a substrate, a first gradient layer, two source/drain structures, a second gradient layer, and a gate. The first gradient layer is disposed on the substrate. The two source/drain structures are separately disposed on the first gradient layer. The second gradient layer is disposed on the two source/drain structures and the first gradient layer, and a second portion of the second gradient layer directly contacts a first portion of the first gradient layer. The gate is disposed on the second gradient layer, between the two source/drain structures.Type: ApplicationFiled: September 5, 2017Publication date: March 7, 2019Inventors: Kuo-Chih Lai, Ming-Chang Lu, Wei Chen, Hui-Lin Wang, Yi-Ting Liao, Chin-Fu Lin
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Patent number: 8954717Abstract: A system capable of booting through a Universal Serial Bus device includes a Universal Serial Bus port, an embedded controller, a platform control hub, and a basic input/output system. The embedded controller is used for generating a boot signal when the system is powered off and at least one Universal Serial Bus device is plugged into the Universal Serial Bus port. The platform control hub is woken up according to the boot signal. The basic input/output system has boot sequence setting values. The basic input/output system first starts to boot the at least one Universal Serial Bus device through the platform control hub according to the boot sequence setting values when the basic input/output system is woken up according to the boot signal.Type: GrantFiled: December 12, 2011Date of Patent: February 10, 2015Assignee: Wistron CorporationInventor: Yi-Ting Liao
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Publication number: 20130061030Abstract: A system capable of booting through a Universal Serial Bus device includes a Universal Serial Bus port, an embedded controller, a platform control hub, and a basic input/output system. The embedded controller is used for generating a boot signal when the system is powered off and at least one Universal Serial Bus device is plugged into the Universal Serial Bus port. The platform control hub is restored according to the boot signal. The basic input/output system has boot sequence setting values. The basic input/output system first starts to boot the at least one Universal Serial Bus device through the platform control hub according to the boot sequence setting values when the basic input/output system is restored according to the boot signal.Type: ApplicationFiled: December 12, 2011Publication date: March 7, 2013Inventor: Yi-Ting Liao
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Publication number: 20120124399Abstract: A power control method for a computer system is disclosed. The computer system establishes wireless connection with a handheld equipment via a wireless communication interface. The power control method includes receiving a sound signal transmitted from the handheld equipment via the wireless communication interface when the computer system operates in a shut-down state, recognizing the sound signal to generate a recognition result, and starting the computer system when the recognition result indicates that the sound signal conforms to a start command.Type: ApplicationFiled: May 25, 2011Publication date: May 17, 2012Inventor: Yi-Ting Liao
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Publication number: 20120038159Abstract: A wind power generating device for use with a vehicle is provided. The wind power generating device is disposed in a front side of an engine chamber of the vehicle and includes: at least one fan blade being driven to rotate by a current of external air introduced into the engine chamber in a manner of natural feeding while the vehicle is moving; a power generator for operating in conjunction with the fan blades and generating electric power; a duct circumferentially disposed at an outermost portion of the fan blades and having an opening, the opening receiving the fan blades, wherein the opening has a front opening portion functioning as a inlet for the external air and a rear opening portion functioning as an outlet for the external air, and the front opening portion being smaller than the rear opening portion.Type: ApplicationFiled: August 13, 2010Publication date: February 16, 2012Inventors: Tzeng-Yuan CHEN, Yean-Der Kuan, Yi-Ting Liao
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Publication number: 20120038158Abstract: A wind power generating module for use with an electric scooter is disclosed. The wind power generating module is installed on an electric scooter and includes: at least one fan blade being driven to rotate by external air introduced into the wind power generating module while the electric scooter is moving; a disc type generator with a rotor configured to rotate in conjunction with the fan blades and generate electric power; a duct circumferentially disposed at an outermost portion of the fan blades and having an opening, the opening receiving the fan blades, wherein the opening has a front opening portion functioning as an inlet for the external air and a rear opening portion functioning as an outlet for the external air, the front opening portion being smaller than the rear opening portion; a front protective cover and a rear protective cover disposed at the inlet and the outlet, respectively.Type: ApplicationFiled: August 13, 2010Publication date: February 16, 2012Inventors: Tzeng-Yuan CHEN, Yi-Ting Liao
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Patent number: 8110520Abstract: A method of preparing carbon-coated metal oxide nano-particles and carbon-coated metal oxide nano-particles prepared with the same method are described. The method includes the following steps at least. A precursor of a polymer is polymerized on metal oxide nano-particles to form polymer-coated metal oxide nano-particles. Then, pyrolysis is conducted to carbonize the polymer coated on the metal oxide nano-particles, so as to form carbon-coated metal oxide nano-particles.Type: GrantFiled: October 27, 2008Date of Patent: February 7, 2012Assignee: National Tsing Hua UniversityInventors: Chia-Min Yang, Yu-Chuan Hsu, Huang-Ching Lin, Yi-Ting Liao, Chien-Wei Lue
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Publication number: 20100035750Abstract: A method of preparing carbon-coated metal oxide nano-particles and carbon-coated metal oxide nano-particles prepared with the same method are described. The method includes the following steps at least. A precursor of a polymer is polymerized on metal oxide nano-particles to form polymer-coated metal oxide nano-particles. Then, pyrolysis is conducted to carbonize the polymer coated on the metal oxide nano-particles, so as to form carbon-coated metal oxide nano-particles.Type: ApplicationFiled: October 27, 2008Publication date: February 11, 2010Applicant: National Tsing Hua UniversityInventors: Chia-Min Yang, Yu-Chuan Hsu, Huang-Ching Lin, Yi-Ting Liao, Chien-Wei Lue
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Patent number: 7494893Abstract: In one embodiment, wafers are processed to build test structures in the wafers. The wafers may be processed in tools of process steps belonging to a process module. The test structures may be tested to obtain defectivity data. Tool process parameters may be monitored and collected as process tool data. Other information about the wafers, such as metrology data and product layout attribute, may also be collected. A model describing the relationship between the defectivity data and process tool data may be created and thereafter used to relate the process tool data to a yield of the process module. The model may initially be an initial model using process tool data from a limited number of test wafers that contain test structures. The model may also be an expanded model using process tool data from product wafers containing embedded test structures in areas with no product devices.Type: GrantFiled: January 17, 2007Date of Patent: February 24, 2009Assignee: PDF Solutions, Inc.Inventors: Anand Inani, Brian E. Stine, Marci Yi-Ting Liao, Senthil Arthanari, Michael V. Williamson, Spencer B. Graves, Guanyuan M. Yu