Patents by Inventor Yiu Lam Chan

Yiu Lam Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9585288
    Abstract: A baffle plate assembly for installation in a rack structure is disclosed. In one aspect, the baffle plate assembly is configured to direct cooling air from a front side of the rack structure to cooling air inlet(s) of equipment located directly above the baffle plate assembly, and to block heated air from below or behind the baffle plate assembly from entering the equipment cooling air inlet(s). In one aspect, the baffle plate assembly includes a baffle plate defining a first surface plane, a pair of side plates, and a pair of mounting brackets. The side plates are configured to extend along the baffle plate while the mounting brackets may be attached to the side plates. In one aspect, the baffle plate first surface plane forms an oblique angle with respect to a plane defined by a first plate member of the mounting brackets.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: February 28, 2017
    Assignee: CommScope Technologies LLC
    Inventors: Clifton Cary Powers, Yiu Lam Chan, Chia-Hsing Liao, Ying-Chou Su
  • Patent number: 9013982
    Abstract: A communication comprises a plurality of digital subscriber line (DSL) links, a first node having at least one application port configured for an elastic service and a plurality of DSL ports, and a second node having at least one application port configured for an elastic service and a plurality of DSL ports. Each of the first and second nodes is configured to interleave data received over the at least one application port across the plurality of DSL ports, each DSL port allocated a set of DSL timeslots for transport of the data received over the at least one application port. When a failure is detected on one of the DSL links, each of the first and second nodes is configured to interleave the data received over the at least one application port across the remaining DSL ports not connected to the failed DSL link without adjusting the set of DSL timeslots allocated to each of the remaining DSL ports for transport of the data from the at least one application port.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: April 21, 2015
    Assignee: ADC DSL Systems, Inc.
    Inventors: Joe Polland, Clifton Powers, Manish Sharma, Laxman R. Anne, Yiu Lam Chan
  • Publication number: 20150076097
    Abstract: A baffle plate assembly for installation in a rack structure is disclosed. In one aspect, the baffle plate assembly is configured to direct cooling air from a front side of the rack structure to cooling air inlet(s) of equipment located directly above the baffle plate assembly, and to block heated air from below or behind the baffle plate assembly from entering the equipment cooling air inlet(s). In one aspect, the baffle plate assembly includes a baffle plate defining a first surface plane, a pair of side plates, and a pair of mounting brackets. The side plates are configured to extend along the baffle plate while the mounting brackets may be attached to the side plates. In one aspect, the baffle plate first surface plane forms an oblique angle with respect to a plane defined by a first plate member of the mounting brackets.
    Type: Application
    Filed: June 9, 2014
    Publication date: March 19, 2015
    Inventors: Clifton Cary Powers, Yiu Lam Chan, Chia-Hsing Liao, Ying-Chou Su
  • Patent number: 8787151
    Abstract: A communication system comprises a plurality of DSL links comprising a first group and second group of DSL links, each group comprising more than one DSL link. The communication system also comprises a first node and a second node each having at least one application port and a plurality of DSL ports. Each DSL port is coupled to a respective one of the DSL links such that the first and second nodes are communicatively coupled via the DSL links. Each of the first and second nodes is configured to interleave a first copy of data received over the respective application port across the first group and to interleave a second copy of the data across the second group. When a failure is detected on a DSL link in the first group, each of the first and second nodes is configured to switch from the first group to the second group.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: July 22, 2014
    Assignee: ADC DSL Systems, Inc.
    Inventors: Joe Polland, Clifton Powers, Manish Sharma, Laxman R. Anne, Yiu Lam Chan
  • Patent number: 8732262
    Abstract: A method to reduce link-up time between nodes in a communication system is provided. The method includes determining a node in the communication system is in a HANDSHAKE state; randomly configuring the node in one of a master mode and a slave mode based on a determination that the node is in the HANDSHAKE state; determining if the node is in a LINK-UP state with a selected node in the communication system based on the random configuring of the node; and randomly re-configuring the node in one of the master mode and the slave mode based on a negative determination that the node is in the LINK-UP state with the selected node.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: May 20, 2014
    Assignee: ADC DSL Systems, Inc.
    Inventors: Yiu Lam Chan, Clifton Powers, Laxman R. Anne, Derli Chan, Manish Sharma, Sheng-Chang Hsu
  • Patent number: 8665897
    Abstract: System and methods for High-speed Digital Subscriber Line Software Download are provided. In one embodiment, a Digital Subscriber Line (DSL) Transceiver Unit is provided. The transceiver unit comprises at least one DSL transceiver, wherein the at least one DSL transceiver implements an Embedded Operations Channel (EOC) and a data path over at least one DSL pair; a first memory for storing a software file for transfer over the DSL pair, wherein the software file comprises a header and at least one file record; and a second memory for storing a provisioning table, wherein the provisioning table establishes timeslot allocations for a plurality of channels communicated over the data path, including provisions for a software download channel for transmitting the software file from the first memory to a target unit over the data path.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: March 4, 2014
    Assignee: ADC DSL Systems, Inc.
    Inventors: Joe Polland, Xinkuan Zhou, Laxman Anne, Manish Sharma, Clifton Powers, Yiu Lam Chan
  • Publication number: 20130054725
    Abstract: A method to reduce link-up time between nodes in a communication system is provided. The method includes determining a node in the communication system is in a HANDSHAKE state; randomly configuring the node in one of a master mode and a slave mode based on a determination that the node is in the HANDSHAKE state; determining if the node is in a LINK-UP state with a selected node in the communication system based on the random configuring of the node; and randomly re-configuring the node in one of the master mode and the slave mode based on a negative determination that the node is in the LINK-UP state with the selected node.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Applicant: 100-ADC DSL SYSTEMS, INC.
    Inventors: Yiu Lam Chan, Clifton Powers, Laxman R. Anne, Derli Chan, Manish Sharma, Sheng-Chang Hsu
  • Publication number: 20130022094
    Abstract: A communication system comprises a plurality of DSL links comprising a first group and second group of DSL links, each group comprising more than one DSL link. The communication system also comprises a first node and a second node each having at least one application port and a plurality of DSL ports. Each DSL port is coupled to a respective one of the DSL links such that the first and second nodes are communicatively coupled via the DSL links. Each of the first and second nodes is configured to interleave a first copy of data received over the respective application port across the first group and to interleave a second copy of the data across the second group. When a failure is detected on a DSL link in the first group, each of the first and second nodes is configured to switch from the first group to the second group.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 24, 2013
    Applicant: ADC DSL Systems, Inc.
    Inventors: Joe Polland, Clifton Powers, Manish Sharma, Laxman R. Anne, Yiu Lam Chan
  • Publication number: 20130021899
    Abstract: A communication comprises a plurality of digital subscriber line (DSL) links, a first node having at least one application port configured for an elastic service and a plurality of DSL ports, and a second node having at least one application port configured for an elastic service and a plurality of DSL ports. Each of the first and second nodes is configured to interleave data received over the at least one application port across the plurality of DSL ports, each DSL port allocated a set of DSL timeslots for transport of the data received over the at least one application port. When a failure is detected on one of the DSL links, each of the first and second nodes is configured to interleave the data received over the at least one application port across the remaining DSL ports not connected to the failed DSL link without adjusting the set of DSL timeslots allocated to each of the remaining DSL ports for transport of the data from the at least one application port.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 24, 2013
    Applicant: ADC DSL SYSTEMS, INC.
    Inventors: Joe Polland, Clifton Powers, Manish Sharma, Laxman R. Anne, Yiu Lam Chan
  • Publication number: 20110099546
    Abstract: System and methods for High-speed Digital Subscriber Line Software Download are provided. In one embodiment, a Digital Subscriber Line (DSL) Transceiver Unit is provided. The transceiver unit comprises at least one DSL transceiver, wherein the at least one DSL transceiver implements an Embedded Operations Channel (EOC) and a data path over at least one DSL pair; a first memory for storing a software file for transfer over the DSL pair, wherein the software file comprises a header and at least one file record; and a second memory for storing a provisioning table, wherein the provisioning table establishes timeslot allocations for a plurality of channels communicated over the data path, including provisions for a software download channel for transmitting the software file from the first memory to a target unit over the data path.
    Type: Application
    Filed: October 26, 2009
    Publication date: April 28, 2011
    Applicant: ADC DSL SYSTEMS, INC.
    Inventors: Joe Polland, Xinkuan Zhou, Laxman Anne, Manish Sharma, Clifton Powers, Yiu Lam Chan
  • Patent number: 6988207
    Abstract: A circuit that uses a bi-directional buffer as follows: First a tri-state output buffer is connected to a functional clock and a bi-directional port is connected to a test clock. The bi-directional buffer is configured to receive control signals to selectively block and unblock the tri-state output port connected to the functional clock. In addition, the bi-directional port connected to a test clock is connected to the internal logic of the device. When the tri-state output buffer connected to the functional clock is blocked, the test clock transmits a clock signal to the internal logic of the device. When the tri-state output buffer connected to the functional clock is unblocked, the functional clock transmits a clock signal to the internal logic of the device.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: January 17, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventors: Yiu Lam Chan, Michael R. Sollins, Ronald R. Munoz
  • Publication number: 20020194561
    Abstract: A circuit that uses a bi-directional buffer as follows: First a tri-state output buffer is connected to a functional clock and a bi-directional port is connected to a test clock. The bi-directional buffer is configured to receive control signals to selectively block and unblock the tri-state output port connected to the functional clock. In addition, the bi-directional port connected to a test clock is connected to the internal logic of the device. When the tri-state output buffer connected to the functional clock is blocked, the test clock transmits a clock signal to the internal logic of the device. When the tri-state output buffer connected to the functional clock is unblocked, the functional clock transmits a clock signal to the internal logic of the device.
    Type: Application
    Filed: June 15, 2001
    Publication date: December 19, 2002
    Applicant: ADC DSL Systems, Inc.
    Inventors: Yiu Lam Chan, Michael R. Sollins, Ronald R. Munoz