Abstract: The present disclosure relates to a liquid-cooling radiating pipe and a vacuum interrupter with a built-in liquid-cooling radiating pipe, belonging to the field of vacuum circuit breakers. Based on an original structure of an vacuum interrupter, a liquid-cooling radiating pipe of a Tesla valve structure is arranged in a conductive rod of the vacuum interrupter with the built-in liquid-cooling radiating pipe, and liquid metal is used as a circulating coolant in the liquid-cooling radiating pipe, and by using the self-circulating flow of the liquid metal in the pipeline, the capacity of the conductive rod to dissipate heat to the outside is significantly increased, and the problem of excessive internal temperature rise of a vacuum circuit breaker is effectively solved.

Abstract: Provided are a data processing system and method based on dynamic redundancy heterogeneous encoding, and a device. The method comprises: respectively performing error correction encoding on information to be processed and a processing rule, so as to form encoded information to be processed and an encoded processing rule; processing, by using the encoded processing rule, the encoded information to be processed, so as to obtain response data; and then performing error correction decoding on N pieces of response data, so as to obtain processing result information of the information to be processed.

Abstract: Provided in the present application are a data processing method and apparatus based on data coding, and a device. The method comprises: performing N-channel error correction coding on data to be processed that is in information to be processed, so as to obtain N pieces of coded data to be processed; by using coded meta-channel data obtained by means of error correction coding, performing redundancy processing on the coded data to be processed, so as to obtain N pieces of response data; and then performing error correction decoding on the N pieces of response data, so as to obtain processing result information of the information to be processed.

Abstract: The present application provides an instruction encoding-based data processing method and apparatus, and a device. N-path error correction encoding is performed on an instruction in information to be processed to obtain N encoded instructions, the encoded instructions and encoded meta channel programs obtained by the error correction encoding are used to perform redundant processing on data to be processed to obtain N pieces of response data, and then error correction decoding is performed on the N pieces of response data to obtain processing result information of the information to be processed. Because the N encoded instructions are heterogeneous and the encoded meta channel programs used in the N-path processing are heterogeneous, the randomness of the processing process can be improved, generalized disturbance in the data processing process can be corrected in combination with the error correction encoding and decoding methods, and thus the security of data processing is improved.

Abstract: A chip is mounted on a surface of the substrate, and the thermally conductive cover is disposed on a side that is of the chip and that is away from the substrate. There is a filling area on a surface that is of the thermally conductive cover and that faces the substrate, and the filling area is opposite to the chip. There is an accommodation cavity whose opening faces the substrate in the filling area. A thermal interface material layer is filled between the chip and a bottom surface of the accommodation cavity. Between an opening edge of the accommodation cavity and the substrate, there is a first gap connected to the accommodation cavity. The filling material encircles a side surface of the thermal interface material layer, so that the filling material separates the side surface of the thermal interface material layer from air.

Abstract: A packaged IC includes a fanout layer, a processor having a first surface residing substantially adjacent a first surface of the fanout layer, a Redistribution Layer (RDL) having a first surface coupled to a second surface of the processor, and a memory coupled to a second surface of the RDL, wherein a first portion of the memory is disposed outside of a footprint of the processor and a second portion of the memory is disposed within the footprint of the processor. The packaged IC further includes first conductive posts disposed beneath the first portion of the memory proximate a first side of the processor for providing communication links between the processor and memory, and second conductive posts coupled between the fanout layer and conductive features of the RDL coupled to power inputs of the second portion of the memory, the second conductive posts proximate a second side of the processor.

Abstract: A chip packaging apparatus and a preparation method thereof are provided, to modulate warpage of a chip, thereby resolving a problem of mismatch between a warpage degree of the chip and a warpage degree of a substrate. The chip packaging apparatus includes a chip, a substrate, and a warpage modulation structure, where a surface that is of the chip and that faces the substrate is electrically connected to the substrate, the warpage modulation structure is disposed on a surface that is of the chip and that is opposite to the substrate, and a coefficient of thermal expansion of the warpage modulation structure is greater than a coefficient of thermal expansion of the chip.