Patents by Inventor Yizhak Bot

Yizhak Bot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11301612
    Abstract: A method, system and computer program product, the method comprising: obtaining circuit information of a portion of a circuit design, the circuit information specifying a plurality of electronic components and a plurality of nets connecting pins of components from the plurality of components, the portion of the circuit design thereby associated with a plurality of nodes comprising the pins and connection points, and one or more ground nodes connected to a ground net; obtaining a set of logical prediction rules and algorithms applicable to circuit designs; applying to the portion of the circuit design one or more applicable rules or algorithms from the set of logical prediction rules and algorithms, to obtain: a predicted potential of one or more nodes, and one or more electrical values for one or more electronic component; and outputting the predicted potential or the electrical values predicted for the electronic components.
    Type: Grant
    Filed: January 3, 2021
    Date of Patent: April 12, 2022
    Assignee: BQR RELIABILITY ENGINEERING LTD.
    Inventors: Yizhak Bot, Alex Gonorovsky, Isaac Rosenstein
  • Patent number: 11270056
    Abstract: A method, system and computer program product, the method comprising: obtaining circuit information, comprising description of groups of pins of electronic chips; obtaining a description of a test comprising a plurality of rules specifying: an identifier, a first group of pins, a second group of pins, a first action to take upon successful interconnection of the first and second groups, and a second action to take upon failure, wherein the first action and second actions are one of: finish with success, finish with failure, and a rule ID of a subsequent rule to check; checking the plurality of rules, comprising checking a sequence of rules starting with a first rule, and wherein each subsequent rule is selected as the first or second action of a preceding rule, in accordance with whether the preceding rule succeeded or failed, respectively; and outputting a result of the plurality of rules.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: March 8, 2022
    Assignee: BQR RELIABILITY ENGINEERING LTD.
    Inventors: Yizhak Bot, Alex Gonorovsky, Isaac Rosenstein
  • Publication number: 20220043958
    Abstract: A method, system and computer program product, the method comprising: obtaining circuit information, comprising description of groups of pins of electronic chips; obtaining a description of a test comprising a plurality of rules specifying: an identifier, a first group of pins, a second group of pins, a first action to take upon successful interconnection of the first and second groups, and a second action to take upon failure, wherein the first action and second actions are one of: finish with success, finish with failure, and a rule ID of a subsequent rule to check; checking the plurality of rules, comprising checking a sequence of rules starting with a first rule, and wherein each subsequent rule is selected as the first or second action of a preceding rule, in accordance with whether the preceding rule succeeded or failed, respectively; and outputting a result of the plurality of rules.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 10, 2022
    Inventors: Yizhak BOT, Alex GONOROVSKY, Isaac ROSENSTEIN
  • Patent number: 11036909
    Abstract: A method, system and computer program product, the method comprising: obtaining information of a circuit to be designed comprising two blocks, the information comprising: block components of the two blocks, information of connectors connecting the two blocks, information of a plurality of internal nets, each internal net connecting components within a same block, information of a plurality of external nets, each external net connecting a component to a connector; automatically generating a design of a merged block, the design comprising: a plurality of circuit components, comprising circuit components of the first block and the second block, each circuit component having a unique designator and an association to an original component; a plurality of internal circuit nets comprising a plurality of internal nets, each internal net associated with a unique designator and an association to a respective internal net designator, and a plurality of combined circuit nets based on the plurality of external nets, each
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: June 15, 2021
    Assignee: BQR RELIABILITY ENGINEERING LTD.
    Inventors: Yizhak Bot, Alex Gonorovsky, Isaac Rosenstein
  • Patent number: 10726176
    Abstract: A method, system and computer program product, the method comprising: obtaining circuit information of at least a portion of a circuit design, the circuit information specifying a plurality of components and a plurality of nets, each of the plurality of nets connecting components from the plurality of components; receiving a multiplicity of design properties for a net selected from the plurality of nets; receiving text indicative of a value for parameter of the net or a predetermined field associated with the net; generating a character string indicative of a design property of the design properties and the value, the character string being in compliance with a naming scheme; and associating the character string with the net as a value of a net name property.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: July 28, 2020
    Assignee: BQR RELIABILITY ENGINEERING LTD.
    Inventors: Yizhak Bot, Alex Gonorovsky, Isaac Rosenstein
  • Publication number: 20200192995
    Abstract: A method, system and computer program product, the method comprising: obtaining circuit information of at least a portion of a circuit design, the circuit information specifying a plurality of components and a plurality of connecting elements connecting components from the plurality of components; receiving a plurality of rule definitions, each rule definition verifying an interaction between one or more first objects and one or more second objects, via one or more connecting elements; obtaining a plurality of specific rules generated upon the plurality of the rule definitions; verifying the specific rules against the circuit information, thereby checking that the first objects have the interaction with the second objects via the one or more connecting elements; and outputting results of verifying the specific rules.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 18, 2020
    Inventors: Yizhak BOT, Alex GONOROVSKY, Isaac ROSENSTEIN
  • Patent number: 10664644
    Abstract: A method, system and computer program product, the method comprising: obtaining circuit information of at least a portion of a circuit design, the circuit information specifying a plurality of components and a plurality of connecting elements connecting components from the plurality of components; receiving a plurality of rule definitions, each rule definition verifying an interaction between one or more first objects and one or more second objects, via one or more connecting elements; obtaining a plurality of specific rules generated upon the plurality of the rule definitions; verifying the specific rules against the circuit information, thereby checking that the first objects have the interaction with the second objects via the one or more connecting elements; and outputting results of verifying the specific rules.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: May 26, 2020
    Assignee: BQR RELIABILITY ENGINEERING LTD.
    Inventors: Yizhak Bot, Alex Gonorovsky, Isaac Rosenstein