Patents by Inventor Yizhou LIN

Yizhou LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210392725
    Abstract: A heating apparatus that applies energy waves to an item located therein includes a main body including a cavity that houses the item, and an energy beam module that converts power from at least one power source into at least one energy beam, and emits the at least one energy beam to intersect with the item, which is directed to the item by at least one of a beam convertor or at least one wall of the cavity. At least one processor determines a plurality of power distributions of energy beams onto at least one surface of the item in respective different configurations of the energy beam module, determines at least one power distribution of the determined plurality of power distributions based on attributes of the item, and controls the energy beam module to perform heating of the item by emitting the energy beams to the item based on the determined at least one power distribution.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 16, 2021
    Inventor: Yizhou LIN
  • Patent number: 10956639
    Abstract: A method of time budgeting an integrated circuit (IC) that includes determining an initial value of time delay variables for each block of a plurality of blocks along a set of timing paths based on delays of each design module of the blocks and determining a value of at least one advanced timing factor adjusting a clock period of the IC along each timing path. The method then generates a time budget for ports along each timing path based on the value of the at least one advanced timing factor and the initial value of the time delay variable. The method then optimizes the value of time delay variables by calculating new values of the time delay variables that satisfy each timing path to minimize a possibility of timing violations and to satisfy the clock period of the IC, which is adjusted by the value of the advanced timing factor.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: March 23, 2021
    Assignees: ARCADIA INNOVATION INCORPORATED, HYGON INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Yizhou Lin, Jian Tang, Hongchang Liang
  • Patent number: 10810344
    Abstract: A method of time budgeting an integrated circuit (IC) including acquiring a graph data structure and clock cycle requirements, where the graph data structure includes at least two identical blocks of a plurality of blocks that correspond to an identical design module. The method acquires internal and external delay values ports of each design module, and sets parameters, which include the internal and external delay values of the at least two identical blocks as equivalent for the identical blocks. The method performs optimization of the parameters of the ports of all of the blocks, and determines whether the optimized parameters of each of the ports satisfy predetermined requirements of the IC. The method outputs a final design of the IC design based on results of the optimization for manufacturing of the IC based on the final design.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: October 20, 2020
    Inventors: Hongchang Liang, Jian Tang, Yizhou Lin
  • Publication number: 20200311224
    Abstract: A method of time budgeting an integrated circuit (IC) including acquiring a graph data structure and clock cycle requirements, where the graph data structure includes at least two identical blocks of a plurality of blocks that correspond to an identical design module. The method acquires internal and external delay values ports of each design module, and sets parameters, which include the internal and external delay values of the at least two identical blocks as equivalent for the identical blocks. The method performs optimization of the parameters of the ports of all of the blocks, and determines whether the optimized parameters of each of the ports satisfy predetermined requirements of the IC. The method outputs a final design of the IC design based on results of the optimization for manufacturing of the IC based on the final design.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 1, 2020
    Inventors: Hongchang LIANG, Jian TANG, Yizhou LIN