Patents by Inventor Yo Kobayashi

Yo Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250080671
    Abstract: An electronic apparatus includes a first substrate on which a first central processing unit (CPU) is mounted, a second substrate on which a second CPU is mounted and a specific function is mountable, and a power supply control unit configured to control power supply from a power source, wherein the power supply control unit controls the power supply to the second CPU when the electronic apparatus shifts to a power saving state depending on a determination result of whether the power supply to the second CPU is required in a case where the electronic apparatus is in the power saving state based on whether the specific function is mounted on the second substrate.
    Type: Application
    Filed: August 28, 2024
    Publication date: March 6, 2025
    Inventor: YO KOBAYASHI
  • Publication number: 20250042073
    Abstract: To provide an injection mold capable of molding a member with reduced weld marks. An injection mold 1 includes: a ring-shaped gate through which a molten resin is poured into a cavity disposed at a center; and a plurality of runners that supply the molten resin supplied from a sprue to the gate, and the gate includes a first ring that has a plurality of gate inlets, each of which communicates with one of the plurality of runners, a second ring that has a slit-shaped gate outlet extending in a circumferential direction and communicating with the cavity, the second ring being disposed inside the first ring and having a thickness thinner than the first ring, and a step that is disposed between the first ring and the second ring and establishes communication between the first ring and the second ring.
    Type: Application
    Filed: July 30, 2024
    Publication date: February 6, 2025
    Inventors: Yukio MIYAKOSHI, Tetsuro HOSAKA, Koshi SATO, Takahiro OI, Yo KOBAYASHI, Kazuhisa FUJIWARA, Hiroshi OTAGURO
  • Publication number: 20250033261
    Abstract: To provide an injection molding device capable of injection-molding a molded article in a tubular shape with a constant inner diameter by using a core with a simple structure with no draft angle.
    Type: Application
    Filed: July 26, 2024
    Publication date: January 30, 2025
    Inventors: Yukio MIYAKOSHI, Tetsuro HOSAKA, Koshi SATO, Takahiro OI, Yo KOBAYASHI, Hiroshi OTAGURO, Kazuhisa FUJIWARA
  • Patent number: 12132872
    Abstract: An information processing system includes an image forming apparatus and a mobile terminal capable of performing wired or wireless communication with the image forming apparatus. A voice recognition application is installed in the mobile terminal. The image forming apparatus includes a pedestal to which the mobile terminal is attached, a motion sensor that starts operating when the mobile terminal is attached to the pedestal to detect whether a person is coming close, and a CPU that instructs, when it is determined based on a result of the detection that a user has come close to use the image forming apparatus, the mobile terminal to start the voice recognition application or operate the same in the foreground. The mobile terminal includes a voice output section configured to notify a user that the mobile terminal is capable of responding to voice input, when the instruction is received.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: October 29, 2024
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yo Kobayashi
  • Patent number: 12123923
    Abstract: A method for predicting an acceleration of the degradation in capacity of an electrochemical device. The method includes obtaining point measurement data from a function linking a voltage across the terminals of the electrochemical device to a state of charge of the electrochemical device, and a measurement of the capacity of the electrochemical device, calculating the derivative of the function and identifying a peak in the variation of the derivative, due to an inflection in the variation of the function and characterizing a quantity representative of an anode capacity of the electrochemical device, estimating a width of the peak and comparing a combination of the peak width and the quantity representative of the anode capacity, to the measurement of the capacity of the electrochemical device, and if the combination is less than the capacity of the electrochemical device, predicting an acceleration of the degradation in capacity of the electrochemical device.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: October 22, 2024
    Assignee: ELECTRICITE DE FRANCE
    Inventors: Marion Fuhrmann, Yo Kobayashi
  • Publication number: 20240080395
    Abstract: An information processing system includes an image forming apparatus and a mobile terminal capable of performing wired or wireless communication with the image forming apparatus. A voice recognition application is installed in the mobile terminal. The image forming apparatus includes a pedestal to which the mobile terminal is attached, a motion sensor that starts operating when the mobile terminal is attached to the pedestal to detect whether a person is coming close, and a CPU that instructs, when it is determined based on a result of the detection that a user has come close to use the image forming apparatus, the mobile terminal to start the voice recognition application or operate the same in the foreground. The mobile terminal includes a voice output section configured to notify a user that the mobile terminal is capable of responding to voice input, when the instruction is received.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Inventor: YO KOBAYASHI
  • Publication number: 20240023226
    Abstract: A printed circuit board includes a front layer including frame ground regions on which connectors to be connected with external apparatuses or communication cables are mounted and which are connected with a ground, a signal ground region which is separated from the frame ground regions at the front layer, on which electronic devices configured to receive signals from the connectors are mounted, and which is connected with a ground, and a static electricity removal ground region separated from the frame ground regions and the signal ground region at the front layer, situated outside the frame ground regions, and connected with a ground.
    Type: Application
    Filed: July 31, 2023
    Publication date: January 18, 2024
    Inventors: Yo Kobayashi, Koji Hirai
  • Patent number: 11829603
    Abstract: An information processing system that is capable of accurately predicting a lifetime of a semiconductor device that carries out communications related to reading and writing of data from and to a storage device. The information processing system has an image forming apparatus having a nonvolatile memory and a first controller that controls reading and writing of data from and to the nonvolatile memory. The information processing system also has a server that monitors a lifetime of the first controller. The server has a receiving I/F that receives information indicating a communication data size of reading and writing of data from and to the nonvolatile memory, and a second controller that predicts the lifetime of the first controller based on the received information indicating the communication data size.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: November 28, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yo Kobayashi
  • Patent number: 11758643
    Abstract: A printed circuit board includes a front layer including frame ground regions on which connectors to be connected with external apparatuses or communication cables are mounted and which are connected with a ground, a signal ground region which is separated from the frame ground regions at the front layer, on which electronic devices configured to receive signals from the connectors are mounted, and which is connected with a ground, and a static electricity removal ground region separated from the frame ground regions and the signal ground region at the front layer, situated outside the frame ground regions, and connected with a ground.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: September 12, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yo Kobayashi, Koji Hirai
  • Publication number: 20230117608
    Abstract: A method for predicting an acceleration of the degradation in capacity of an electrochemical device. The method includes obtaining point measurement data from a function linking a voltage across the terminals of the electrochemical device to a state of charge of the electrochemical device, and a measurement of the capacity of the electrochemical device, calculating the derivative of the function and identifying a peak in the variation of the derivative, due to an inflection in the variation of the function and characterizing a quantity representative of an anode capacity of the electrochemical device, estimating a width of the peak and comparing a combination of the peak width and the quantity representative of the anode capacity, to the measurement of the capacity of the electrochemical device, and if the combination is less than the capacity of the electrochemical device, predicting an acceleration of the degradation in capacity of the electrochemical device.
    Type: Application
    Filed: October 13, 2022
    Publication date: April 20, 2023
    Applicant: ELECTRICITE DE FRANCE
    Inventors: Marion FUHRMANN, Yo KOBAYASHI
  • Patent number: 11604588
    Abstract: An apparatus includes a nonvolatile semiconductor memory device storing identification information and first setting information on an output signal, a memory holding identification information of nonvolatile semiconductor memory devices, the identification information including the identification information of the nonvolatile semiconductor memory device, and setting information on an output signal associated with the identification information of the nonvolatile semiconductor memory devices, the setting information including at least second setting information on the output signal, and a processor acquiring the identification information of the nonvolatile semiconductor memory.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: March 14, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yo Kobayashi
  • Publication number: 20220313102
    Abstract: Provided is a paracentesis assistance system that identifies the type of biological tissue. The paracentesis assistance system (10) comprises a measurement device that applies high-frequency waves to at least two electrodes (31 and 32) of an electrode needle (3) inserted into a biological tissue (9), and repeatedly measures the electrical impedance of the biological tissue (9) where the electrode (31) is located, the electrodes being arranged at the tip of the electrode needle in a longitudinal direction; and an identification device (2) that identifies the type of biological tissue (9) based on the temporal change in the repeatedly measured electrical impedance.
    Type: Application
    Filed: September 1, 2020
    Publication date: October 6, 2022
    Inventors: Yo KOBAYASHI, Chiyo OOTAKI
  • Publication number: 20220256689
    Abstract: A printed circuit board includes a front layer including frame ground regions on which connectors to be connected with external apparatuses or communication cables are mounted and which are connected with a ground, a signal ground region which is separated from the frame ground regions at the front layer, on which electronic devices configured to receive signals from the connectors are mounted, and which is connected with a ground, and a static electricity removal ground region separated from the frame ground regions and the signal ground region at the front layer, situated outside the frame ground regions, and connected with a ground.
    Type: Application
    Filed: April 26, 2022
    Publication date: August 11, 2022
    Inventors: Yo Kobayashi, Koji Hirai
  • Patent number: 11343903
    Abstract: A printed circuit board (100) includes a front layer (30) including frame ground regions (102a, 102b) on which connectors (202, 203) to be connected with external apparatuses or communication cables are mounted and which are connected with a ground, a signal ground region (101) which is separated from the frame ground regions at the front layer, on which electronic devices (200, 201) configured to receive signals from the connectors are mounted, and which is connected with a ground, and a static electricity removal ground region (103) separated from the frame ground regions (102a, 102b) and the signal ground region (101) at the front layer, situated outside the frame ground regions (102a, 102b), and connected with a ground.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: May 24, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yo Kobayashi, Koji Hirai
  • Publication number: 20210382630
    Abstract: An information processing system that is capable of accurately predicting a lifetime of a semiconductor device that carries out communications related to reading and writing of data from and to a storage device. The information processing system has an image forming apparatus having a nonvolatile memory and a first controller that controls reading and writing of data from and to the nonvolatile memory. The information processing system also has a server that monitors a lifetime of the first controller. The server has a receiving I/F that receives information indicating a communication data size of reading and writing of data from and to the nonvolatile memory, and a second controller that predicts the lifetime of the first controller based on the received information indicating the communication data size.
    Type: Application
    Filed: May 21, 2021
    Publication date: December 9, 2021
    Inventor: Yo Kobayashi
  • Patent number: 11181963
    Abstract: An information processing device shifts to first and second power states and includes an output unit to output an operation stop signal, and a device to receive the operation stop signal and to shift to an operation stop state based on the operation stop signal, and to shift to an electric power saving mode where less power is consumed than in the operation stop state on condition that the operation stop signal has not been input. A signal control unit provides control that prevents the operation stop signal from being input to the device when the information processing device shifts to the second power state. The signal control unit controls the operation stop signal when a restart unit restarts the information processing device.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: November 23, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yo Kobayashi
  • Patent number: 11126726
    Abstract: A verification circuit provided in an information processing apparatus verifies the presence or absence of the tampering of a boot program stored in a memory. A monitoring circuit monitors a signal communicated between the verification circuit and the memory and detects that the start-up of a system has failed due to the tampering of the boot program based on a monitoring result of the signal. Subsequently, the monitoring circuit provides notification of information related to a cause of failure of the start-up of the system.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 21, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Yo Kobayashi
  • Publication number: 20210124514
    Abstract: An apparatus includes a nonvolatile semiconductor memory device storing identification information and first setting information on an output signal, a memory holding identification information of nonvolatile semiconductor memory devices, the identification information including the identification information of the nonvolatile semiconductor memory device, and setting information on an output signal associated with the identification information of the nonvolatile semiconductor memory devices, the setting information including at least second setting information on the output signal, and a processor acquiring the identification information of the nonvolatile semiconductor memory.
    Type: Application
    Filed: October 19, 2020
    Publication date: April 29, 2021
    Inventor: Yo Kobayashi
  • Publication number: 20210045232
    Abstract: A printed circuit board (100) includes a front layer (30) including frame ground regions (102a, 102b) on which connectors (202, 203) to be connected with external apparatuses or communication cables are mounted and which are connected with a ground, a signal ground region (101) which is separated from the frame ground regions at the front layer, on which electronic devices (200, 201) configured to receive signals from the connectors are mounted, and which is connected with a ground, and a static electricity removal ground region (103) separated from the frame ground regions (102a, 102b) and the signal ground region (101) at the front layer, situated outside the frame ground regions (102a, 102b), and connected with a ground.
    Type: Application
    Filed: August 3, 2020
    Publication date: February 11, 2021
    Inventors: Yo Kobayashi, Koji Hirai
  • Patent number: 10866771
    Abstract: An information processing apparatus shifts to at least a first power state and to a second power state where more power is saved than that in the first power state, and includes an output unit configured to output an operation stop signal, a device configured to receive the operation stop signal, and configured to shift to an operation stop state based on the operation stop signal, and to a power saving mode of saving more power than that in the operation stop state, at least on condition that the operation stop signal is not input, and a signal output unit configured to receive the operation stop signal output from the output unit, and configured to output the operation stop signal to the device based on information indicating a power state of the information processing apparatus.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: December 15, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yo Kobayashi