Abstract: An embodiment of the invention includes determining a first security status for first information and a second security status for second information, the second security status being more secure than the first security status; establishing a first communication path between the system and a first local computing node via a first wireless path; conveying the first information to the first local computing node via the first wireless path based on the first security status; and withholding the second information from the first local computing node based on the second security status; wherein the first and second information are stored on at least one of the system and a remotely located computing node. Other embodiments are described herein.

Abstract: Embodiments are generally directed to a system for contextual adaptation of physical space. An apparatus may include a processor to process data regarding a physical space; logic, implemented at least in part in hardware, to monitor the physical space, including monitoring of sensor data and scheduling data for the physical space; an algorithm to generate a revised configuration for the physical space based at least in part on the sensor data and the scheduling data; and an output display to display the revised configuration for the physical space.

Abstract: An embodiment of the invention includes determining a first security status for first information and a second security status for second information, the second security status being more secure than the first security status; establishing a first communication path between the system and a first local computing node via a first wireless path; conveying the first information to the first local computing node via the first wireless path based on the first security status; and withholding the second information from the first local computing node based on the second security status; wherein the first and second information are stored on at least one of the system and a remotely located computing node. Other embodiments are described herein.

Abstract: An embodiment of the invention includes determining a first security status for first information and a second security status for second information, the second security status being more secure than the first security status; establishing a first communication path between the system and a first local computing node via a first wireless path; conveying the first information to the first local computing node via the first wireless path based on the first security status; and withholding the second information from the first local computing node based on the second security status; wherein the first and second information are stored on at least one of the system and a remotely located computing node. Other embodiments are described herein.

Abstract: An embodiment of the invention includes determining a first security status for first information and a second security status for second information, the second security status being more secure than the first security status; establishing a first communication path between the system and a first local computing node via a first wireless path; conveying the first information to the first local computing node via the first wireless path based on the first security status; and withholding the second information from the first local computing node based on the second security status; wherein the first and second information are stored on at least one of the system and a remotely located computing node. Other embodiments are described herein.

Abstract: A multiprocessor programmable interrupt controller (MPIC) system has an interrupt bus, distinct from the system (memory) bus, for handling interrupt-related messages. I/O device interrupt lines are connected to one or more interrupt delivery units (IDUs) that are each coupled to the interrupt bus for broadcasting of I/O-generated interrupt request messages. Each processor chip has an on-board interrupt acceptance unit (IAU) that can accept interrupt requests from the interrupt bus and can broadcast on the interrupt bus interrupt request messages generated by its associated processor. Each processor can request to read the contents of the IAU control registers that are associated with another target processor. In that case, a remote read request message is generated by the IAU of the local processor and responded to, without software intervention, by the IAU of the target processor. A remote read status field indicates to the local processor the status of the data contained in a remote read register.

Abstract: A method and apparatus for upgrading a uniprocessor system to a multiprocessing system simply by the insertion of a second microprocessor integrated circuit. The computer system is provided with an upgrade socket for receiving the second processing unit, as well as a private communications bus between the upgrade socket and the existing processor for handling interprocessor communications, bus arbitration and cache coherency, etc. The addition of the second processor is transparent to the system which maintains its memory management unit and caching system and other arrangements as though it were still a uniprocessing system. Therefore, an inexpensive method and apparatus are provided for greatly enhancing the speed of a uniprocessing system to that of a multiprocessing system without the cost traditionally associated with multiprocessing systems.