Patents by Inventor Yoel Shetrit

Yoel Shetrit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CMOS-compatible gold-free contacts
    Patent number: 9252118
    Abstract: A semiconductor metallurgy includes a ratio of germanium and palladium that provides low contact resistance to both n-type material and p-type material. The metallurgy allows for a contact that does not include gold and is compatible with mass-production CMOS techniques. The ratio of germanium and palladium can be achieved by stacking layers of the materials and annealing the stack, or simultaneously depositing the germanium and palladium on the material where the contact is to be manufactured.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 2, 2016
    Assignees: INTEL CORPORATION, THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Siddharth Jain, John Bowers, Matthew Sysak, John Heck, Ran Feldesh, Richard Jones, Yoel Shetrit, Michael Geva
  • CMOS-COMPATIBLE GOLD-FREE CONTACTS
    Publication number: 20140050243
    Abstract: A semiconductor metallurgy includes a ratio of germanium and palladium that provides low contact resistance to both n-type material and p-type material. The metallurgy allows for a contact that does not include gold and is compatible with mass-production CMOS techniques. The ratio of germanium and palladium can be achieved by stacking layers of the materials and annealing the stack, or simultaneously depositing the germanium and palladium on the material where the contact is to be manufactured.
    Type: Application
    Filed: December 22, 2011
    Publication date: February 20, 2014
    Inventors: Siddharth Jain, John Bowers, Matthew Sysak, John Heck, Ran Feldesh, Richard Jones, Yoel Shetrit, Michael Geva
  • Method and apparatus for high speed silicon optical modulation using PN diode
    Patent number: 7747122
    Abstract: A method and apparatus for high speed silicon optical modulation is described using a PN diode. In one example, an optical waveguide has adjoining first and second doped semiconductor regions. The first and second regions have opposite doping types and the first doped region extends in two perpendicular directions through the waveguide.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: June 29, 2010
    Assignee: Intel Corporation
    Inventors: Yoel Shetrit, Ling Liao, Ansheng Liu
  • Method and Apparatus for High Speed Silicon Optical Modulation Using PN Diode
    Publication number: 20100080504
    Abstract: A method and apparatus for high speed silicon optical modulation is described using a PN diode. In one example, an optical waveguide has adjoining first and second doped semiconductor regions. The first and second regions have opposite doping types and the first doped region extends in two perpendicular directions through the waveguide.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Inventors: Yoel Shetrit, Ling Liao, Amsheng Liu