Patents by Inventor Yogendra Bobra

Yogendra Bobra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6765409
    Abstract: A low-voltage programmable connector includes two separate paths. Each path includes a buffer and a pair of transmission gates whose control terminals receive the voltages supplied by a memory element associated with that path. If the voltages supplied by the memory elements respectively close the transmission gates in the first path and open those in the second path, signal is transferred from the first terminal to the second terminal of the connector. If the voltages supplied by the memory elements respectively open the transmission gates in the first path and close those in the second path, signal is transferred from the second terminal to the first terminal of the connector. If the voltages supplied by the memory elements open the transmission gates in both the first and second paths, signal transfer between the first and second terminals of the connector is inhibited.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: July 20, 2004
    Assignee: Extensil Corporation
    Inventors: Madhu Vora, Yogendra Bobra
  • Publication number: 20030057999
    Abstract: A low-voltage programmable connector includes two separate paths. Each path includes a buffer and a pair of transmission gates whose control terminals receive the voltages supplied by a memory element associated with that path. If the voltages supplied by the memory elements respectively close the transmission gates in the first path and open those in the second path, signal is transferred from the first terminal to the second terminal of the connector. If the voltages supplied by the memory elements respectively open the transmission gates in the first path and close those in the second path, signal is transferred from the second terminal to the first terminal of the connector. If the voltages supplied by the memory elements open the transmission gates in both the first and second paths, signal transfer between the first and second terminals of the connector is inhibited.
    Type: Application
    Filed: September 9, 2002
    Publication date: March 27, 2003
    Applicant: Extensil, Inc.
    Inventors: Madhu Vora, Yogendra Bobra
  • Patent number: 4460982
    Abstract: An E.sup.2 PROM is disclosed which provides automatic programming verification. Before data is written into the cells, the cells are automatically erased. The contents of the cells are checked to verify that erasing has been completed. If it has not, erasing is continued until the cells are erased. When data is written into the cells, the writing of the data into the cells continues until programming is verified. The verification is conducted at potentials other than the normal reference potential to assure that the cells are well programmed with either binary zeroes or binary ones.
    Type: Grant
    Filed: May 20, 1982
    Date of Patent: July 17, 1984
    Assignee: Intel Corporation
    Inventors: Lubin Gee, Pearl Cheng, Yogendra Bobra, Rustam Mehta