Patents by Inventor YOGESH DESHPANDE

YOGESH DESHPANDE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240004651
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 4, 2024
    Inventors: Yogesh DESHPANDE, Pandurang V. DESHPANDE
  • Patent number: 11740902
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: August 29, 2023
    Assignee: Intel Corporation
    Inventors: Yogesh Deshpande, Pandurang V. Deshpande
  • Publication number: 20230070764
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 9, 2023
    Inventors: Yogesh DESHPANDE, Pandurang V. DESHPANDE
  • Patent number: 11500633
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Yogesh Deshpande, Pandurang V. Deshpande
  • Patent number: 11259804
    Abstract: A method is used to manufacture a frame of a curved surgical stapler. The method includes manufacturing a first portion of the frame of the curved surgical stapler separate from the first portion. The first portion includes a first curvilinear portion of an end effector and a first alignment feature. The method also includes manufacturing a second portion of the frame of the curved surgical stapler. The second portion includes a second alignment feature. The method also includes manufacturing a third portion of the frame of the curved surgical stapler separate from either of the first or second portions. The third portion includes a C-shaped track. The method also includes aligning the first and second portions portion with the second portion by aligning the first and second alignment features. The method also includes coupling the first and second portions of the frame of the curved surgical stapler together.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: March 1, 2022
    Assignee: Cilag GmbH International
    Inventors: Anil K. Nalagatla, Frederick E. Shelton, IV, Chester O. Baxter, III, Sohom Bairagi, Yogesh Deshpande, Sambit Kumar Acharya, Chinmaya Ranjan Dash
  • Publication number: 20220039796
    Abstract: A method is used to manufacture a frame of a curved surgical stapler. The method includes manufacturing a first portion of the frame of the curved surgical stapler separate from the first portion. The first portion includes a first curvilinear portion of an end effector and a first alignment feature. The method also includes manufacturing a second portion of the frame of the curved surgical stapler. The second portion includes a second alignment feature. The method also includes manufacturing a third portion of the frame of the curved surgical stapler separate from either of the first or second portions. The third portion includes a C-shaped track. The method also includes aligning the first and second portions portion with the second portion by aligning the first and second alignment features. The method also includes coupling the first and second portions of the frame of the curved surgical stapler together.
    Type: Application
    Filed: August 27, 2021
    Publication date: February 10, 2022
    Inventors: Anil K. Nalagatla, Frederick E. Shelton, IV, Chester O. Baxter, III, Sohom Bairagi, Yogesh Deshpande, Sambit Kumar Acharya, Chinmaya Ranjan Dash
  • Publication number: 20210255865
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Application
    Filed: January 27, 2021
    Publication date: August 19, 2021
    Inventors: Yogesh DESHPANDE, Pandurang V. DESHPANDE
  • Patent number: 10936313
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: March 2, 2021
    Assignee: Intel Corporation
    Inventors: Yogesh Deshpande, Pandurang V. Deshpande
  • Publication number: 20200205815
    Abstract: A method is used to manufacture a frame of a curved surgical stapler. The method includes manufacturing a first portion of the frame of the curved surgical stapler separate from the first portion. The first portion includes a first curvilinear portion of an end effector and a first alignment feature. The method also includes manufacturing a second portion of the frame of the curved surgical stapler. The second portion includes a second alignment feature. The method also includes manufacturing a third portion of the frame of the curved surgical stapler separate from either of the first or second portions. The third portion includes a C-shaped track. The method also includes aligning the first and second portions portion with the second portion by aligning the first and second alignment features. The method also includes coupling the first and second portions of the frame of the curved surgical stapler together.
    Type: Application
    Filed: December 31, 2018
    Publication date: July 2, 2020
    Inventors: Anil K. Nalagatla, Frederick E. Shelton, IV, Chester O. Baxter, III, Sohom Bairagi, Yogesh Deshpande, Sambit Kumar Acharya, Chinmaya Ranjan Dash
  • Publication number: 20200004537
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Application
    Filed: January 23, 2019
    Publication date: January 2, 2020
    Inventors: Yogesh DESHPANDE, Pandurang V. DESHPANDE
  • Patent number: 10296335
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: May 21, 2019
    Assignee: INTEL CORPORATION
    Inventors: Yogesh Deshpande, Pandurang V Deshpande
  • Publication number: 20170118761
    Abstract: Examples include systems and methods for managing a radio frequency (RF) resource in a multi-subscription multi-standby communication device during cell acquisition. A first radio resource management sublayer associated with a first radio access technology may receive a request to establish a high priority communication session over a communication network using a first subscription. The multi-subscription multi-standby communication device may initialize a guard timer for a guard time period in response to receiving the request to establish the communication session over the communication network. The multi-subscription multi-standby communication device may block access to the RF resource by a second subscription of the MSMS communication device until the guard time period has elapsed, or until the high priority communication session has been established on the first subscription.
    Type: Application
    Filed: December 8, 2015
    Publication date: April 27, 2017
    Inventor: Yogesh Deshpande
  • Publication number: 20160196141
    Abstract: An apparatus and method are described for efficiently processing and reassigning interrupts. For example, one embodiment of an apparatus comprises: a plurality of cores; and an interrupt controller to group interrupts into a plurality of interrupt domains, each interrupt domain to have a set of one or more interrupts assigned thereto and to map the interrupts in the set to one or more of the plurality of cores.
    Type: Application
    Filed: September 22, 2015
    Publication date: July 7, 2016
    Inventors: YOGESH DESHPANDE, PANDURANG V. DESHPANDE